1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
|
; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mattr=+thumb2 | FileCheck %s
; If-conversion defeats the purpose of this test, which is to check conditional
; branch generation, so use memory barrier instruction to make sure it doesn't
; happen and we get actual branches.
define i32 @f1(i32 %a, i32 %b, i32* %v) {
entry:
; CHECK: f1:
; CHECK: bne LBB
%tmp = icmp eq i32 %a, %b ; <i1> [#uses=1]
br i1 %tmp, label %cond_true, label %return
cond_true: ; preds = %entry
fence seq_cst
store i32 0, i32* %v
ret i32 0
return: ; preds = %entry
fence seq_cst
ret i32 1
}
define i32 @f2(i32 %a, i32 %b, i32* %v) {
entry:
; CHECK: f2:
; CHECK: bge LBB
%tmp = icmp slt i32 %a, %b ; <i1> [#uses=1]
br i1 %tmp, label %cond_true, label %return
cond_true: ; preds = %entry
fence seq_cst
store i32 0, i32* %v
ret i32 0
return: ; preds = %entry
fence seq_cst
ret i32 1
}
define i32 @f3(i32 %a, i32 %b, i32* %v) {
entry:
; CHECK: f3:
; CHECK: bhs LBB
%tmp = icmp ult i32 %a, %b ; <i1> [#uses=1]
br i1 %tmp, label %cond_true, label %return
cond_true: ; preds = %entry
fence seq_cst
store i32 0, i32* %v
ret i32 0
return: ; preds = %entry
fence seq_cst
ret i32 1
}
define i32 @f4(i32 %a, i32 %b, i32* %v) {
entry:
; CHECK: f4:
; CHECK: blo LBB
%tmp = icmp uge i32 %a, %b ; <i1> [#uses=1]
br i1 %tmp, label %cond_true, label %return
cond_true: ; preds = %entry
fence seq_cst
store i32 0, i32* %v
ret i32 0
return: ; preds = %entry
fence seq_cst
ret i32 1
}
|
