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|
//===- PTXInstrInfo.td - PTX Instruction defs -----------------*- tblgen-*-===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// This file describes the PTX instructions in TableGen format.
//
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
// Instruction format superclass
//===----------------------------------------------------------------------===//
include "PTXInstrFormats.td"
//===----------------------------------------------------------------------===//
// Code Generation Predicates
//===----------------------------------------------------------------------===//
// Addressing
def Use32BitAddresses : Predicate<"!getSubtarget().is64Bit()">;
def Use64BitAddresses : Predicate<"getSubtarget().is64Bit()">;
// Shader Model Support
def SupportsSM13 : Predicate<"getSubtarget().supportsSM13()">;
def DoesNotSupportSM13 : Predicate<"!getSubtarget().supportsSM13()">;
def SupportsSM20 : Predicate<"getSubtarget().supportsSM20()">;
def DoesNotSupportSM20 : Predicate<"!getSubtarget().supportsSM20()">;
// PTX Version Support
def SupportsPTX21 : Predicate<"getSubtarget().supportsPTX21()">;
def DoesNotSupportPTX21 : Predicate<"!getSubtarget().supportsPTX21()">;
def SupportsPTX22 : Predicate<"getSubtarget().supportsPTX22()">;
def DoesNotSupportPTX22 : Predicate<"!getSubtarget().supportsPTX22()">;
//===----------------------------------------------------------------------===//
// Instruction Pattern Stuff
//===----------------------------------------------------------------------===//
def load_global : PatFrag<(ops node:$ptr), (load node:$ptr), [{
const Value *Src;
const PointerType *PT;
if ((Src = cast<LoadSDNode>(N)->getSrcValue()) &&
(PT = dyn_cast<PointerType>(Src->getType())))
return PT->getAddressSpace() == PTX::GLOBAL;
return false;
}]>;
def load_constant : PatFrag<(ops node:$ptr), (load node:$ptr), [{
const Value *Src;
const PointerType *PT;
if ((Src = cast<LoadSDNode>(N)->getSrcValue()) &&
(PT = dyn_cast<PointerType>(Src->getType())))
return PT->getAddressSpace() == PTX::CONSTANT;
return false;
}]>;
def load_local : PatFrag<(ops node:$ptr), (load node:$ptr), [{
const Value *Src;
const PointerType *PT;
if ((Src = cast<LoadSDNode>(N)->getSrcValue()) &&
(PT = dyn_cast<PointerType>(Src->getType())))
return PT->getAddressSpace() == PTX::LOCAL;
return false;
}]>;
def load_parameter : PatFrag<(ops node:$ptr), (load node:$ptr), [{
const Value *Src;
const PointerType *PT;
if ((Src = cast<LoadSDNode>(N)->getSrcValue()) &&
(PT = dyn_cast<PointerType>(Src->getType())))
return PT->getAddressSpace() == PTX::PARAMETER;
return false;
}]>;
def load_shared : PatFrag<(ops node:$ptr), (load node:$ptr), [{
const Value *Src;
const PointerType *PT;
if ((Src = cast<LoadSDNode>(N)->getSrcValue()) &&
(PT = dyn_cast<PointerType>(Src->getType())))
return PT->getAddressSpace() == PTX::SHARED;
return false;
}]>;
def store_global
: PatFrag<(ops node:$d, node:$ptr), (store node:$d, node:$ptr), [{
const Value *Src;
const PointerType *PT;
if ((Src = cast<StoreSDNode>(N)->getSrcValue()) &&
(PT = dyn_cast<PointerType>(Src->getType())))
return PT->getAddressSpace() == PTX::GLOBAL;
return false;
}]>;
def store_local
: PatFrag<(ops node:$d, node:$ptr), (store node:$d, node:$ptr), [{
const Value *Src;
const PointerType *PT;
if ((Src = cast<StoreSDNode>(N)->getSrcValue()) &&
(PT = dyn_cast<PointerType>(Src->getType())))
return PT->getAddressSpace() == PTX::LOCAL;
return false;
}]>;
def store_parameter
: PatFrag<(ops node:$d, node:$ptr), (store node:$d, node:$ptr), [{
const Value *Src;
const PointerType *PT;
if ((Src = cast<StoreSDNode>(N)->getSrcValue()) &&
(PT = dyn_cast<PointerType>(Src->getType())))
return PT->getAddressSpace() == PTX::PARAMETER;
return false;
}]>;
def store_shared
: PatFrag<(ops node:$d, node:$ptr), (store node:$d, node:$ptr), [{
const Value *Src;
const PointerType *PT;
if ((Src = cast<StoreSDNode>(N)->getSrcValue()) &&
(PT = dyn_cast<PointerType>(Src->getType())))
return PT->getAddressSpace() == PTX::SHARED;
return false;
}]>;
// Addressing modes.
def ADDRrr32 : ComplexPattern<i32, 2, "SelectADDRrr", [], []>;
def ADDRrr64 : ComplexPattern<i64, 2, "SelectADDRrr", [], []>;
def ADDRri32 : ComplexPattern<i32, 2, "SelectADDRri", [], []>;
def ADDRri64 : ComplexPattern<i64, 2, "SelectADDRri", [], []>;
def ADDRii32 : ComplexPattern<i32, 2, "SelectADDRii", [], []>;
def ADDRii64 : ComplexPattern<i64, 2, "SelectADDRii", [], []>;
// Address operands
def MEMri32 : Operand<i32> {
let PrintMethod = "printMemOperand";
let MIOperandInfo = (ops RRegu32, i32imm);
}
def MEMri64 : Operand<i64> {
let PrintMethod = "printMemOperand";
let MIOperandInfo = (ops RRegu64, i64imm);
}
def MEMii32 : Operand<i32> {
let PrintMethod = "printMemOperand";
let MIOperandInfo = (ops i32imm, i32imm);
}
def MEMii64 : Operand<i64> {
let PrintMethod = "printMemOperand";
let MIOperandInfo = (ops i64imm, i64imm);
}
// The operand here does not correspond to an actual address, so we
// can use i32 in 64-bit address modes.
def MEMpi : Operand<i32> {
let PrintMethod = "printParamOperand";
let MIOperandInfo = (ops i32imm);
}
// Branch & call targets have OtherVT type.
def brtarget : Operand<OtherVT>;
def calltarget : Operand<i32>;
//===----------------------------------------------------------------------===//
// PTX Specific Node Definitions
//===----------------------------------------------------------------------===//
// PTX allow generic 3-reg shifts like shl r0, r1, r2
def PTXshl : SDNode<"ISD::SHL", SDTIntBinOp>;
def PTXsrl : SDNode<"ISD::SRL", SDTIntBinOp>;
def PTXsra : SDNode<"ISD::SRA", SDTIntBinOp>;
def PTXexit
: SDNode<"PTXISD::EXIT", SDTNone, [SDNPHasChain]>;
def PTXret
: SDNode<"PTXISD::RET", SDTNone, [SDNPHasChain]>;
def PTXcopyaddress
: SDNode<"PTXISD::COPY_ADDRESS", SDTypeProfile<1, 1, []>, []>;
//===----------------------------------------------------------------------===//
// Instruction Class Templates
//===----------------------------------------------------------------------===//
//===- Floating-Point Instructions - 3 Operand Form -----------------------===//
multiclass PTX_FLOAT_3OP<string opcstr, SDNode opnode> {
def rr32 : InstPTX<(outs RRegf32:$d),
(ins RRegf32:$a, RRegf32:$b),
!strconcat(opcstr, ".f32\t$d, $a, $b"),
[(set RRegf32:$d, (opnode RRegf32:$a, RRegf32:$b))]>;
def ri32 : InstPTX<(outs RRegf32:$d),
(ins RRegf32:$a, f32imm:$b),
!strconcat(opcstr, ".f32\t$d, $a, $b"),
[(set RRegf32:$d, (opnode RRegf32:$a, fpimm:$b))]>;
def rr64 : InstPTX<(outs RRegf64:$d),
(ins RRegf64:$a, RRegf64:$b),
!strconcat(opcstr, ".f64\t$d, $a, $b"),
[(set RRegf64:$d, (opnode RRegf64:$a, RRegf64:$b))]>;
def ri64 : InstPTX<(outs RRegf64:$d),
(ins RRegf64:$a, f64imm:$b),
!strconcat(opcstr, ".f64\t$d, $a, $b"),
[(set RRegf64:$d, (opnode RRegf64:$a, fpimm:$b))]>;
}
//===- Floating-Point Instructions - 4 Operand Form -----------------------===//
multiclass PTX_FLOAT_4OP<string opcstr, SDNode opnode1, SDNode opnode2> {
def rrr32 : InstPTX<(outs RRegf32:$d),
(ins RRegf32:$a, RRegf32:$b, RRegf32:$c),
!strconcat(opcstr, ".f32\t$d, $a, $b, $c"),
[(set RRegf32:$d, (opnode2 (opnode1 RRegf32:$a,
RRegf32:$b),
RRegf32:$c))]>;
def rri32 : InstPTX<(outs RRegf32:$d),
(ins RRegf32:$a, RRegf32:$b, f32imm:$c),
!strconcat(opcstr, ".f32\t$d, $a, $b, $c"),
[(set RRegf32:$d, (opnode2 (opnode1 RRegf32:$a,
RRegf32:$b),
fpimm:$c))]>;
def rrr64 : InstPTX<(outs RRegf64:$d),
(ins RRegf64:$a, RRegf64:$b, RRegf64:$c),
!strconcat(opcstr, ".f64\t$d, $a, $b, $c"),
[(set RRegf64:$d, (opnode2 (opnode1 RRegf64:$a,
RRegf64:$b),
RRegf64:$c))]>;
def rri64 : InstPTX<(outs RRegf64:$d),
(ins RRegf64:$a, RRegf64:$b, f64imm:$c),
!strconcat(opcstr, ".f64\t$d, $a, $b, $c"),
[(set RRegf64:$d, (opnode2 (opnode1 RRegf64:$a,
RRegf64:$b),
fpimm:$c))]>;
}
multiclass INT3<string opcstr, SDNode opnode> {
def rr16 : InstPTX<(outs RRegu16:$d),
(ins RRegu16:$a, RRegu16:$b),
!strconcat(opcstr, ".u16\t$d, $a, $b"),
[(set RRegu16:$d, (opnode RRegu16:$a, RRegu16:$b))]>;
def ri16 : InstPTX<(outs RRegu16:$d),
(ins RRegu16:$a, i16imm:$b),
!strconcat(opcstr, ".u16\t$d, $a, $b"),
[(set RRegu16:$d, (opnode RRegu16:$a, imm:$b))]>;
def rr32 : InstPTX<(outs RRegu32:$d),
(ins RRegu32:$a, RRegu32:$b),
!strconcat(opcstr, ".u32\t$d, $a, $b"),
[(set RRegu32:$d, (opnode RRegu32:$a, RRegu32:$b))]>;
def ri32 : InstPTX<(outs RRegu32:$d),
(ins RRegu32:$a, i32imm:$b),
!strconcat(opcstr, ".u32\t$d, $a, $b"),
[(set RRegu32:$d, (opnode RRegu32:$a, imm:$b))]>;
def rr64 : InstPTX<(outs RRegu64:$d),
(ins RRegu64:$a, RRegu64:$b),
!strconcat(opcstr, ".u64\t$d, $a, $b"),
[(set RRegu64:$d, (opnode RRegu64:$a, RRegu64:$b))]>;
def ri64 : InstPTX<(outs RRegu64:$d),
(ins RRegu64:$a, i64imm:$b),
!strconcat(opcstr, ".u64\t$d, $a, $b"),
[(set RRegu64:$d, (opnode RRegu64:$a, imm:$b))]>;
}
multiclass PTX_LOGIC<string opcstr, SDNode opnode> {
def rr16 : InstPTX<(outs RRegu16:$d),
(ins RRegu16:$a, RRegu16:$b),
!strconcat(opcstr, ".b16\t$d, $a, $b"),
[(set RRegu16:$d, (opnode RRegu16:$a, RRegu16:$b))]>;
def ri16 : InstPTX<(outs RRegu16:$d),
(ins RRegu16:$a, i16imm:$b),
!strconcat(opcstr, ".b16\t$d, $a, $b"),
[(set RRegu16:$d, (opnode RRegu16:$a, imm:$b))]>;
def rr32 : InstPTX<(outs RRegu32:$d),
(ins RRegu32:$a, RRegu32:$b),
!strconcat(opcstr, ".b32\t$d, $a, $b"),
[(set RRegu32:$d, (opnode RRegu32:$a, RRegu32:$b))]>;
def ri32 : InstPTX<(outs RRegu32:$d),
(ins RRegu32:$a, i32imm:$b),
!strconcat(opcstr, ".b32\t$d, $a, $b"),
[(set RRegu32:$d, (opnode RRegu32:$a, imm:$b))]>;
def rr64 : InstPTX<(outs RRegu64:$d),
(ins RRegu64:$a, RRegu64:$b),
!strconcat(opcstr, ".b64\t$d, $a, $b"),
[(set RRegu64:$d, (opnode RRegu64:$a, RRegu64:$b))]>;
def ri64 : InstPTX<(outs RRegu64:$d),
(ins RRegu64:$a, i64imm:$b),
!strconcat(opcstr, ".b64\t$d, $a, $b"),
[(set RRegu64:$d, (opnode RRegu64:$a, imm:$b))]>;
}
multiclass INT3ntnc<string opcstr, SDNode opnode> {
def rr16 : InstPTX<(outs RRegu16:$d),
(ins RRegu16:$a, RRegu16:$b),
!strconcat(opcstr, "16\t$d, $a, $b"),
[(set RRegu16:$d, (opnode RRegu16:$a, RRegu16:$b))]>;
def rr32 : InstPTX<(outs RRegu32:$d),
(ins RRegu32:$a, RRegu32:$b),
!strconcat(opcstr, "32\t$d, $a, $b"),
[(set RRegu32:$d, (opnode RRegu32:$a, RRegu32:$b))]>;
def rr64 : InstPTX<(outs RRegu64:$d),
(ins RRegu64:$a, RRegu64:$b),
!strconcat(opcstr, "64\t$d, $a, $b"),
[(set RRegu64:$d, (opnode RRegu64:$a, RRegu64:$b))]>;
def ri16 : InstPTX<(outs RRegu16:$d),
(ins RRegu16:$a, i16imm:$b),
!strconcat(opcstr, "16\t$d, $a, $b"),
[(set RRegu16:$d, (opnode RRegu16:$a, imm:$b))]>;
def ri32 : InstPTX<(outs RRegu32:$d),
(ins RRegu32:$a, i32imm:$b),
!strconcat(opcstr, "32\t$d, $a, $b"),
[(set RRegu32:$d, (opnode RRegu32:$a, imm:$b))]>;
def ri64 : InstPTX<(outs RRegu64:$d),
(ins RRegu64:$a, i64imm:$b),
!strconcat(opcstr, "64\t$d, $a, $b"),
[(set RRegu64:$d, (opnode RRegu64:$a, imm:$b))]>;
def ir16 : InstPTX<(outs RRegu16:$d),
(ins i16imm:$a, RRegu16:$b),
!strconcat(opcstr, "16\t$d, $a, $b"),
[(set RRegu16:$d, (opnode imm:$a, RRegu16:$b))]>;
def ir32 : InstPTX<(outs RRegu32:$d),
(ins i32imm:$a, RRegu32:$b),
!strconcat(opcstr, "32\t$d, $a, $b"),
[(set RRegu32:$d, (opnode imm:$a, RRegu32:$b))]>;
def ir64 : InstPTX<(outs RRegu64:$d),
(ins i64imm:$a, RRegu64:$b),
!strconcat(opcstr, "64\t$d, $a, $b"),
[(set RRegu64:$d, (opnode imm:$a, RRegu64:$b))]>;
}
multiclass PTX_SETP_I<RegisterClass RC, string regclsname, Operand immcls,
CondCode cmp, string cmpstr> {
// TODO support 5-operand format: p|q, a, b, c
def rr
: InstPTX<(outs Preds:$p), (ins RC:$a, RC:$b),
!strconcat("setp.", cmpstr, ".", regclsname, "\t$p, $a, $b"),
[(set Preds:$p, (setcc RC:$a, RC:$b, cmp))]>;
def ri
: InstPTX<(outs Preds:$p), (ins RC:$a, immcls:$b),
!strconcat("setp.", cmpstr, ".", regclsname, "\t$p, $a, $b"),
[(set Preds:$p, (setcc RC:$a, imm:$b, cmp))]>;
def rr_and_r
: InstPTX<(outs Preds:$p), (ins RC:$a, RC:$b, Preds:$c),
!strconcat("setp.", cmpstr, ".and.", regclsname, "\t$p, $a, $b, $c"),
[(set Preds:$p, (and (setcc RC:$a, RC:$b, cmp), Preds:$c))]>;
def ri_and_r
: InstPTX<(outs Preds:$p), (ins RC:$a, immcls:$b, Preds:$c),
!strconcat("setp.", cmpstr, ".and.", regclsname, "\t$p, $a, $b, $c"),
[(set Preds:$p, (and (setcc RC:$a, imm:$b, cmp), Preds:$c))]>;
def rr_or_r
: InstPTX<(outs Preds:$p), (ins RC:$a, RC:$b, Preds:$c),
!strconcat("setp.", cmpstr, ".or.", regclsname, "\t$p, $a, $b, $c"),
[(set Preds:$p, (or (setcc RC:$a, RC:$b, cmp), Preds:$c))]>;
def ri_or_r
: InstPTX<(outs Preds:$p), (ins RC:$a, immcls:$b, Preds:$c),
!strconcat("setp.", cmpstr, ".or.", regclsname, "\t$p, $a, $b, $c"),
[(set Preds:$p, (or (setcc RC:$a, imm:$b, cmp), Preds:$c))]>;
def rr_xor_r
: InstPTX<(outs Preds:$p), (ins RC:$a, RC:$b, Preds:$c),
!strconcat("setp.", cmpstr, ".xor.", regclsname, "\t$p, $a, $b, $c"),
[(set Preds:$p, (xor (setcc RC:$a, RC:$b, cmp), Preds:$c))]>;
def ri_xor_r
: InstPTX<(outs Preds:$p), (ins RC:$a, immcls:$b, Preds:$c),
!strconcat("setp.", cmpstr, ".xor.", regclsname, "\t$p, $a, $b, $c"),
[(set Preds:$p, (xor (setcc RC:$a, imm:$b, cmp), Preds:$c))]>;
def rr_and_not_r
: InstPTX<(outs Preds:$p), (ins RC:$a, RC:$b, Preds:$c),
!strconcat("setp.", cmpstr, ".and.", regclsname, "\t$p, $a, $b, !$c"),
[(set Preds:$p, (and (setcc RC:$a, RC:$b, cmp), (not Preds:$c)))]>;
def ri_and_not_r
: InstPTX<(outs Preds:$p), (ins RC:$a, immcls:$b, Preds:$c),
!strconcat("setp.", cmpstr, ".and.", regclsname, "\t$p, $a, $b, !$c"),
[(set Preds:$p, (and (setcc RC:$a, imm:$b, cmp), (not Preds:$c)))]>;
def rr_or_not_r
: InstPTX<(outs Preds:$p), (ins RC:$a, RC:$b, Preds:$c),
!strconcat("setp.", cmpstr, ".or.", regclsname, "\t$p, $a, $b, !$c"),
[(set Preds:$p, (or (setcc RC:$a, RC:$b, cmp), (not Preds:$c)))]>;
def ri_or_not_r
: InstPTX<(outs Preds:$p), (ins RC:$a, immcls:$b, Preds:$c),
!strconcat("setp.", cmpstr, ".or.", regclsname, "\t$p, $a, $b, !$c"),
[(set Preds:$p, (or (setcc RC:$a, imm:$b, cmp), (not Preds:$c)))]>;
def rr_xor_not_r
: InstPTX<(outs Preds:$p), (ins RC:$a, RC:$b, Preds:$c),
!strconcat("setp.", cmpstr, ".xor.", regclsname, "\t$p, $a, $b, !$c"),
[(set Preds:$p, (xor (setcc RC:$a, RC:$b, cmp), (not Preds:$c)))]>;
def ri_xor_not_r
: InstPTX<(outs Preds:$p), (ins RC:$a, immcls:$b, Preds:$c),
!strconcat("setp.", cmpstr, ".xor.", regclsname, "\t$p, $a, $b, !$c"),
[(set Preds:$p, (xor (setcc RC:$a, imm:$b, cmp), (not Preds:$c)))]>;
}
multiclass PTX_SETP_FP<RegisterClass RC, string regclsname,
CondCode ucmp, CondCode ocmp, string cmpstr> {
// TODO support 5-operand format: p|q, a, b, c
def rr_u
: InstPTX<(outs Preds:$p), (ins RC:$a, RC:$b),
!strconcat("setp.", cmpstr, "u.", regclsname, "\t$p, $a, $b"),
[(set Preds:$p, (setcc RC:$a, RC:$b, ucmp))]>;
def rr_o
: InstPTX<(outs Preds:$p), (ins RC:$a, RC:$b),
!strconcat("setp.", cmpstr, ".", regclsname, "\t$p, $a, $b"),
[(set Preds:$p, (setcc RC:$a, RC:$b, ocmp))]>;
def rr_and_r_u
: InstPTX<(outs Preds:$p), (ins RC:$a, RC:$b, Preds:$c),
!strconcat("setp.", cmpstr, "u.and.", regclsname, "\t$p, $a, $b, $c"),
[(set Preds:$p, (and (setcc RC:$a, RC:$b, ucmp), Preds:$c))]>;
def rr_and_r_o
: InstPTX<(outs Preds:$p), (ins RC:$a, RC:$b, Preds:$c),
!strconcat("setp.", cmpstr, ".and.", regclsname, "\t$p, $a, $b, $c"),
[(set Preds:$p, (and (setcc RC:$a, RC:$b, ocmp), Preds:$c))]>;
def rr_or_r_u
: InstPTX<(outs Preds:$p), (ins RC:$a, RC:$b, Preds:$c),
!strconcat("setp.", cmpstr, "u.or.", regclsname, "\t$p, $a, $b, $c"),
[(set Preds:$p, (or (setcc RC:$a, RC:$b, ucmp), Preds:$c))]>;
def rr_or_r_o
: InstPTX<(outs Preds:$p), (ins RC:$a, RC:$b, Preds:$c),
!strconcat("setp.", cmpstr, ".or.", regclsname, "\t$p, $a, $b, $c"),
[(set Preds:$p, (or (setcc RC:$a, RC:$b, ocmp), Preds:$c))]>;
def rr_xor_r_u
: InstPTX<(outs Preds:$p), (ins RC:$a, RC:$b, Preds:$c),
!strconcat("setp.", cmpstr, "u.xor.", regclsname, "\t$p, $a, $b, $c"),
[(set Preds:$p, (xor (setcc RC:$a, RC:$b, ucmp), Preds:$c))]>;
def rr_xor_r_o
: InstPTX<(outs Preds:$p), (ins RC:$a, RC:$b, Preds:$c),
!strconcat("setp.", cmpstr, ".xor.", regclsname, "\t$p, $a, $b, $c"),
[(set Preds:$p, (xor (setcc RC:$a, RC:$b, ocmp), Preds:$c))]>;
def rr_and_not_r_u
: InstPTX<(outs Preds:$p), (ins RC:$a, RC:$b, Preds:$c),
!strconcat("setp.", cmpstr, "u.and.", regclsname, "\t$p, $a, $b, !$c"),
[(set Preds:$p, (and (setcc RC:$a, RC:$b, ucmp), (not Preds:$c)))]>;
def rr_and_not_r_o
: InstPTX<(outs Preds:$p), (ins RC:$a, RC:$b, Preds:$c),
!strconcat("setp.", cmpstr, ".and.", regclsname, "\t$p, $a, $b, !$c"),
[(set Preds:$p, (and (setcc RC:$a, RC:$b, ocmp), (not Preds:$c)))]>;
def rr_or_not_r_u
: InstPTX<(outs Preds:$p), (ins RC:$a, RC:$b, Preds:$c),
!strconcat("setp.", cmpstr, "u.or.", regclsname, "\t$p, $a, $b, !$c"),
[(set Preds:$p, (or (setcc RC:$a, RC:$b, ucmp), (not Preds:$c)))]>;
def rr_or_not_r_o
: InstPTX<(outs Preds:$p), (ins RC:$a, RC:$b, Preds:$c),
!strconcat("setp.", cmpstr, ".or.", regclsname, "\t$p, $a, $b, !$c"),
[(set Preds:$p, (or (setcc RC:$a, RC:$b, ocmp), (not Preds:$c)))]>;
def rr_xor_not_r_u
: InstPTX<(outs Preds:$p), (ins RC:$a, RC:$b, Preds:$c),
!strconcat("setp.", cmpstr, "u.xor.", regclsname, "\t$p, $a, $b, !$c"),
[(set Preds:$p, (xor (setcc RC:$a, RC:$b, ucmp), (not Preds:$c)))]>;
def rr_xor_not_r_o
: InstPTX<(outs Preds:$p), (ins RC:$a, RC:$b, Preds:$c),
!strconcat("setp.", cmpstr, ".xor.", regclsname, "\t$p, $a, $b, !$c"),
[(set Preds:$p, (xor (setcc RC:$a, RC:$b, ocmp), (not Preds:$c)))]>;
}
multiclass PTX_LD<string opstr, string typestr, RegisterClass RC, PatFrag pat_load> {
def rr32 : InstPTX<(outs RC:$d),
(ins MEMri32:$a),
!strconcat(opstr, !strconcat(typestr, "\t$d, [$a]")),
[(set RC:$d, (pat_load ADDRrr32:$a))]>, Requires<[Use32BitAddresses]>;
def rr64 : InstPTX<(outs RC:$d),
(ins MEMri64:$a),
!strconcat(opstr, !strconcat(typestr, "\t$d, [$a]")),
[(set RC:$d, (pat_load ADDRrr64:$a))]>, Requires<[Use64BitAddresses]>;
def ri32 : InstPTX<(outs RC:$d),
(ins MEMri32:$a),
!strconcat(opstr, !strconcat(typestr, "\t$d, [$a]")),
[(set RC:$d, (pat_load ADDRri32:$a))]>, Requires<[Use32BitAddresses]>;
def ri64 : InstPTX<(outs RC:$d),
(ins MEMri64:$a),
!strconcat(opstr, !strconcat(typestr, "\t$d, [$a]")),
[(set RC:$d, (pat_load ADDRri64:$a))]>, Requires<[Use64BitAddresses]>;
def ii32 : InstPTX<(outs RC:$d),
(ins MEMii32:$a),
!strconcat(opstr, !strconcat(typestr, &qu
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