1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
|
//===-- SPUFrameInfo.h - Top-level interface for Cell SPU Target -*- C++ -*-==//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// This file contains CellSPU frame information that doesn't fit anywhere else
// cleanly...
//
//===----------------------------------------------------------------------===//
#ifndef SPU_FRAMEINFO_H
#define SPU_FRAMEINFO_H
#include "SPURegisterInfo.h"
#include "llvm/Target/TargetFrameInfo.h"
#include "llvm/Target/TargetMachine.h"
namespace llvm {
class SPUSubtarget;
class SPUFrameInfo: public TargetFrameInfo {
const SPUSubtarget &Subtarget;
std::pair<unsigned, int> LR[1];
public:
SPUFrameInfo(const SPUSubtarget &sti);
//! Determine the frame's layour
void determineFrameLayout(MachineFunction &MF) const;
/// emitProlog/emitEpilog - These methods insert prolog and epilog code into
/// the function.
void emitPrologue(MachineFunction &MF) const;
void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
//! Prediate: Target has dedicated frame pointer
bool hasFP(const MachineFunction &MF) const;
void processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
RegScavenger *RS = NULL) const;
//! Perform target-specific stack frame setup.
void getInitialFrameState(std::vector<MachineMove> &Moves) const;
//! Return a function's saved spill slots
/*!
For CellSPU, a function's saved spill slots is just the link register.
*/
const std::pair<unsigned, int> *
getCalleeSaveSpillSlots(unsigned &NumEntries) const;
//! Stack slot size (16 bytes)
static int stackSlotSize() {
return 16;
}
//! Maximum frame offset representable by a signed 10-bit integer
/*!
This is the maximum frame offset that can be expressed as a 10-bit
integer, used in D-form addresses.
*/
static int maxFrameOffset() {
return ((1 << 9) - 1) * stackSlotSize();
}
//! Minimum frame offset representable by a signed 10-bit integer
static int minFrameOffset() {
return -(1 << 9) * stackSlotSize();
}
//! Minimum frame size (enough to spill LR + SP)
static int minStackSize() {
return (2 * stackSlotSize());
}
//! Convert frame index to stack offset
static int FItoStackOffset(int frame_index) {
return frame_index * stackSlotSize();
}
//! Number of instructions required to overcome hint-for-branch latency
/*!
HBR (hint-for-branch) instructions can be inserted when, for example,
we know that a given function is going to be called, such as printf(),
in the control flow graph. HBRs are only inserted if a sufficient number
of instructions occurs between the HBR and the target. Currently, HBRs
take 6 cycles, ergo, the magic number 6.
*/
static int branchHintPenalty() {
return 6;
}
};
}
#endif
|
