blob: a3236256843c1bf76a7961db866cac17967e825d (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
|
//===-- SPUMCTargetDesc.cpp - Cell SPU Target Descriptions -----*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// This file provides Cell SPU specific target descriptions.
//
//===----------------------------------------------------------------------===//
#include "SPUMCTargetDesc.h"
#include "llvm/MC/MCInstrInfo.h"
#include "llvm/MC/MCRegisterInfo.h"
#include "llvm/MC/MCSubtargetInfo.h"
#include "llvm/Target/TargetRegistry.h"
#define GET_INSTRINFO_MC_DESC
#include "SPUGenInstrInfo.inc"
#define GET_SUBTARGETINFO_MC_DESC
#include "SPUGenSubtargetInfo.inc"
#define GET_REGINFO_MC_DESC
#include "SPUGenRegisterInfo.inc"
using namespace llvm;
MCInstrInfo *createSPUMCInstrInfo() {
MCInstrInfo *X = new MCInstrInfo();
InitSPUMCInstrInfo(X);
return X;
}
extern "C" void LLVMInitializeCellSPUMCInstrInfo() {
TargetRegistry::RegisterMCInstrInfo(TheCellSPUTarget, createSPUMCInstrInfo);
}
MCSubtargetInfo *createSPUMCSubtargetInfo(StringRef TT, StringRef CPU,
StringRef FS) {
MCSubtargetInfo *X = new MCSubtargetInfo();
InitSPUMCSubtargetInfo(X, TT, CPU, FS);
return X;
}
extern "C" void LLVMInitializeCellSPUMCSubtargetInfo() {
TargetRegistry::RegisterMCSubtargetInfo(TheCellSPUTarget,
createSPUMCSubtargetInfo);
}
|