From b55c8bed9d0f3eaa454a657746d8ec11aae9dea3 Mon Sep 17 00:00:00 2001 From: Evan Cheng Date: Sat, 1 May 2010 00:28:44 +0000 Subject: Add a pseudo instruction REG_SEQUENCE that takes a list of registers and sub-register indices and outputs a single super register which is formed from a consecutive sequence of registers. This is used as register allocation / coalescing aid and it is useful to represent instructions that output register pairs / quads. For example, v1024, v1025 = vload
where v1024 and v1025 forms a register pair. This really should be modelled as v1024<3>, v1025<4> = vload
but it would violate SSA property before register allocation is done. Currently we use insert_subreg to form the super register: v1026 = implicit_def v1027 - insert_subreg v1026, v1024, 3 v1028 = insert_subreg v1027, v1025, 4 ... = use v1024 = use v1028 But this adds pseudo live interval overlap between v1024 and v1025. We can now modeled it as v1024, v1025 = vload
v1026 = REG_SEQUENCE v1024, 3, v1025, 4 ... = use v1024 = use v1026 After coalescing, it will be v1026<3>, v1025<4> = vload
... = use v1026<3> = use v1026 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102815 91177308-0d34-0410-b5e6-96231b3b80d8 --- utils/TableGen/CodeGenTarget.cpp | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'utils/TableGen/CodeGenTarget.cpp') diff --git a/utils/TableGen/CodeGenTarget.cpp b/utils/TableGen/CodeGenTarget.cpp index 0392895ba4..1efe2ff080 100644 --- a/utils/TableGen/CodeGenTarget.cpp +++ b/utils/TableGen/CodeGenTarget.cpp @@ -326,6 +326,7 @@ void CodeGenTarget::ComputeInstrsByEnum() const { const CodeGenInstruction *COPY_TO_REGCLASS = GetInstByName("COPY_TO_REGCLASS", Insts); const CodeGenInstruction *DBG_VALUE = GetInstByName("DBG_VALUE", Insts); + const CodeGenInstruction *REG_SEQUENCE = GetInstByName("REG_SEQUENCE", Insts); // Print out the rest of the instructions now. InstrsByEnum.push_back(PHI); @@ -340,6 +341,7 @@ void CodeGenTarget::ComputeInstrsByEnum() const { InstrsByEnum.push_back(SUBREG_TO_REG); InstrsByEnum.push_back(COPY_TO_REGCLASS); InstrsByEnum.push_back(DBG_VALUE); + InstrsByEnum.push_back(REG_SEQUENCE); unsigned EndOfPredefines = InstrsByEnum.size(); @@ -357,7 +359,8 @@ void CodeGenTarget::ComputeInstrsByEnum() const { CGI != IMPLICIT_DEF && CGI != SUBREG_TO_REG && CGI != COPY_TO_REGCLASS && - CGI != DBG_VALUE) + CGI != DBG_VALUE && + CGI != REG_SEQUENCE) InstrsByEnum.push_back(CGI); } -- cgit v1.2.3-70-g09d2