From f9a4bb78dadc12c7c1e604c6f17b63a71305c2ca Mon Sep 17 00:00:00 2001 From: Jakob Stoklund Olesen Date: Fri, 30 Sep 2011 22:18:45 +0000 Subject: Compute lists of super-classes in CodeGenRegisterClass. Use these lists instead of computing them on the fly in RegisterInfoEmitter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140895 91177308-0d34-0410-b5e6-96231b3b80d8 --- utils/TableGen/CodeGenRegisters.cpp | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'utils/TableGen/CodeGenRegisters.cpp') diff --git a/utils/TableGen/CodeGenRegisters.cpp b/utils/TableGen/CodeGenRegisters.cpp index c712495012..35f247a2e3 100644 --- a/utils/TableGen/CodeGenRegisters.cpp +++ b/utils/TableGen/CodeGenRegisters.cpp @@ -414,6 +414,16 @@ computeSubClasses(ArrayRef RegClasses) { for (unsigned s = rci - 1; s && RC.hasSubClass(RegClasses[s - 1]); --s) RC.SubClasses.set(s - 1); } + + // Compute the SuperClasses lists from the SubClasses vectors. + for (unsigned rci = 0; rci != RegClasses.size(); ++rci) { + const BitVector &SC = RegClasses[rci]->getSubClasses(); + for (int s = SC.find_first(); s >= 0; s = SC.find_next(s)) { + if (unsigned(s) == rci) + continue; + RegClasses[s]->SuperClasses.push_back(RegClasses[rci]); + } + } } //===----------------------------------------------------------------------===// -- cgit v1.2.3-70-g09d2