From e97190fdf875843e8161a942f2046fd3ef81330f Mon Sep 17 00:00:00 2001
From: Bruno Cardoso Lopes <bruno.cardoso@gmail.com>
Date: Tue, 20 Sep 2011 23:19:33 +0000
Subject: Add a DAGCombine for subvector extracts to remove useless chains of
 subvector inserts and extracts. Initial patch by Rackover, Zvi with some
 tweak done by me.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140204 91177308-0d34-0410-b5e6-96231b3b80d8
---
 test/CodeGen/X86/avx-vinsertf128.ll | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

(limited to 'test/CodeGen')

diff --git a/test/CodeGen/X86/avx-vinsertf128.ll b/test/CodeGen/X86/avx-vinsertf128.ll
index 2b2f7e5411..cda1331da3 100644
--- a/test/CodeGen/X86/avx-vinsertf128.ll
+++ b/test/CodeGen/X86/avx-vinsertf128.ll
@@ -37,3 +37,22 @@ allocas:
   ret void
 }
 
+;; DAG Combine must remove useless vinsertf128 instructions
+
+; CHECK: DAGCombineA
+; CHECK-NOT: vinsertf128 $1
+define <4 x i32> @DAGCombineA(<4 x i32> %v1) nounwind readonly {
+  %1 = shufflevector <4 x i32> %v1, <4 x i32> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
+  %2 = shufflevector <8 x i32> %1, <8 x i32> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
+  ret <4 x i32> %2
+}
+
+; CHECK: DAGCombineB
+; CHECK: vpaddd %xmm
+; CHECK-NOT: vinsertf128  $1
+; CHECK: vpaddd %xmm
+define <8 x i32> @DAGCombineB(<8 x i32> %v1, <8 x i32> %v2) nounwind readonly {
+  %1 = add <8 x i32> %v1, %v2
+  %2 = add <8 x i32> %1, %v1
+  ret <8 x i32> %2
+}
-- 
cgit v1.2.3-70-g09d2