From 149a4e56fcd29c37c416e0ce4a5ebed7b514cbc6 Mon Sep 17 00:00:00 2001
From: Chris Lattner <sabre@nondot.org>
Date: Fri, 22 Feb 2008 02:09:43 +0000
Subject: Start using GPR's to copy around mmx value instead of mmx regs. GCC
 apparently does this, and code depends on not having to do emms when this
 happens.  This is x86-64 only so far, second half should handle x86-32.

rdar://5741668


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47470 91177308-0d34-0410-b5e6-96231b3b80d8
---
 test/CodeGen/X86/mmx-copy-gprs.ll | 14 ++++++++++++++
 1 file changed, 14 insertions(+)
 create mode 100644 test/CodeGen/X86/mmx-copy-gprs.ll

(limited to 'test/CodeGen')

diff --git a/test/CodeGen/X86/mmx-copy-gprs.ll b/test/CodeGen/X86/mmx-copy-gprs.ll
new file mode 100644
index 0000000000..8cf36e05a8
--- /dev/null
+++ b/test/CodeGen/X86/mmx-copy-gprs.ll
@@ -0,0 +1,14 @@
+; RUN: llvm-as < %s | llc -march=x86-64 | grep {movq.*(%rsi), %rax}
+
+; This test should use GPRs to copy the mmx value, not MMX regs.  Using mmx regs,
+; increases the places that need to use emms.
+
+; rdar://5741668
+target triple = "x86_64-apple-darwin8"
+
+define i32 @foo(<1 x i64>* %x, <1 x i64>* %y) nounwind  {
+entry:
+	%tmp1 = load <1 x i64>* %y, align 8		; <<1 x i64>> [#uses=1]
+	store <1 x i64> %tmp1, <1 x i64>* %x, align 8
+	ret i32 undef
+}
-- 
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