From c53ab4d77f4b3d2905cf9ad625c28ff6b1c04aff Mon Sep 17 00:00:00 2001 From: Hal Finkel Date: Thu, 28 Mar 2013 13:29:47 +0000 Subject: Add the PPC64 popcntd instruction PPC ISA 2.06 (P7, A2, etc.) has a popcntd instruction. Add this instruction and tell TTI about it so that popcount-loop recognition will know about it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178233 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/PowerPC/popcnt.ll | 41 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 41 insertions(+) create mode 100644 test/CodeGen/PowerPC/popcnt.ll (limited to 'test/CodeGen/PowerPC/popcnt.ll') diff --git a/test/CodeGen/PowerPC/popcnt.ll b/test/CodeGen/PowerPC/popcnt.ll new file mode 100644 index 0000000000..363f7059e4 --- /dev/null +++ b/test/CodeGen/PowerPC/popcnt.ll @@ -0,0 +1,41 @@ +; RUN: llc -march=ppc64 -mattr=+popcntd < %s | FileCheck %s + +define i8 @cnt8(i8 %x) nounwind readnone { + %cnt = tail call i8 @llvm.ctpop.i8(i8 %x) + ret i8 %cnt +; CHECK: @cnt8 +; CHECK: rldicl +; CHECK: popcntd +; CHECK: blr +} + +define i16 @cnt16(i16 %x) nounwind readnone { + %cnt = tail call i16 @llvm.ctpop.i16(i16 %x) + ret i16 %cnt +; CHECK: @cnt16 +; CHECK: rldicl +; CHECK: popcntd +; CHECK: blr +} + +define i32 @cnt32(i32 %x) nounwind readnone { + %cnt = tail call i32 @llvm.ctpop.i32(i32 %x) + ret i32 %cnt +; CHECK: @cnt32 +; CHECK: rldicl +; CHECK: popcntd +; CHECK: blr +} + +define i64 @cnt64(i64 %x) nounwind readnone { + %cnt = tail call i64 @llvm.ctpop.i64(i64 %x) + ret i64 %cnt +; CHECK: @cnt64 +; CHECK: popcntd +; CHECK: blr +} + +declare i8 @llvm.ctpop.i8(i8) nounwind readnone +declare i16 @llvm.ctpop.i16(i16) nounwind readnone +declare i32 @llvm.ctpop.i32(i32) nounwind readnone +declare i64 @llvm.ctpop.i64(i64) nounwind readnone -- cgit v1.2.3-18-g5258 From 1fce88313e4d46fdd432b68f7c54fde972c0b526 Mon Sep 17 00:00:00 2001 From: Hal Finkel Date: Mon, 1 Apr 2013 15:58:15 +0000 Subject: Add the PPC popcntw instruction The popcntw instruction is available whenever the popcntd instruction is available, and performs a separate popcnt on the lower and upper 32-bits. Ignoring the high-order count, this can be used for the 32-bit input case (saving on the explicit zero extension otherwise required to use popcntd). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178470 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/PowerPC/popcnt.ll | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) (limited to 'test/CodeGen/PowerPC/popcnt.ll') diff --git a/test/CodeGen/PowerPC/popcnt.ll b/test/CodeGen/PowerPC/popcnt.ll index 363f7059e4..b304d72aed 100644 --- a/test/CodeGen/PowerPC/popcnt.ll +++ b/test/CodeGen/PowerPC/popcnt.ll @@ -4,8 +4,8 @@ define i8 @cnt8(i8 %x) nounwind readnone { %cnt = tail call i8 @llvm.ctpop.i8(i8 %x) ret i8 %cnt ; CHECK: @cnt8 -; CHECK: rldicl -; CHECK: popcntd +; CHECK: rlwinm +; CHECK: popcntw ; CHECK: blr } @@ -13,8 +13,8 @@ define i16 @cnt16(i16 %x) nounwind readnone { %cnt = tail call i16 @llvm.ctpop.i16(i16 %x) ret i16 %cnt ; CHECK: @cnt16 -; CHECK: rldicl -; CHECK: popcntd +; CHECK: rlwinm +; CHECK: popcntw ; CHECK: blr } @@ -22,8 +22,7 @@ define i32 @cnt32(i32 %x) nounwind readnone { %cnt = tail call i32 @llvm.ctpop.i32(i32 %x) ret i32 %cnt ; CHECK: @cnt32 -; CHECK: rldicl -; CHECK: popcntd +; CHECK: popcntw ; CHECK: blr } -- cgit v1.2.3-18-g5258