From f2453a3f2f14d59592ab4f6c2db0843d343338f5 Mon Sep 17 00:00:00 2001 From: Justin Holewinski Date: Tue, 10 May 2011 14:53:13 +0000 Subject: PTX: add test cases for cvt, fneg, and selp Patch by Dan Bailey git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131128 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/PTX/cvt.ll | 234 +++++++++++++++++++++++++++++++++++++++++++++++ test/CodeGen/PTX/fneg.ll | 15 +++ test/CodeGen/PTX/selp.ll | 25 +++++ 3 files changed, 274 insertions(+) create mode 100644 test/CodeGen/PTX/cvt.ll create mode 100644 test/CodeGen/PTX/fneg.ll create mode 100644 test/CodeGen/PTX/selp.ll (limited to 'test/CodeGen/PTX') diff --git a/test/CodeGen/PTX/cvt.ll b/test/CodeGen/PTX/cvt.ll new file mode 100644 index 0000000000..2f793dede6 --- /dev/null +++ b/test/CodeGen/PTX/cvt.ll @@ -0,0 +1,234 @@ +; RUN: llc < %s -march=ptx32 | FileCheck %s + +; preds +; (note: we convert back to i32 to return) + +define ptx_device i32 @cvt_pred_i16(i16 %x, i1 %y) { +; CHECK: cvt.pred.u16 p0, rh1; +; CHECK: ret; + %a = trunc i16 %x to i1 + %b = and i1 %a, %y + %c = zext i1 %b to i32 + ret i32 %c +} + +define ptx_device i32 @cvt_pred_i32(i32 %x, i1 %y) { +; CHECK: cvt.pred.u32 p0, r1; +; CHECK: ret; + %a = trunc i32 %x to i1 + %b = and i1 %a, %y + %c = zext i1 %b to i32 + ret i32 %c +} + +define ptx_device i32 @cvt_pred_i64(i64 %x, i1 %y) { +; CHECK: cvt.pred.u64 p0, rd1; +; CHECK: ret; + %a = trunc i64 %x to i1 + %b = and i1 %a, %y + %c = zext i1 %b to i32 + ret i32 %c +} + +define ptx_device i32 @cvt_pred_f32(float %x, i1 %y) { +; CHECK: cvt.rni.pred.f32 p0, f1; +; CHECK: ret; + %a = fptoui float %x to i1 + %b = and i1 %a, %y + %c = zext i1 %b to i32 + ret i32 %c +} + +define ptx_device i32 @cvt_pred_f64(double %x, i1 %y) { +; CHECK: cvt.rni.pred.f64 p0, fd1; +; CHECK: ret; + %a = fptoui double %x to i1 + %b = and i1 %a, %y + %c = zext i1 %b to i32 + ret i32 %c +} + +; i16 + +define ptx_device i16 @cvt_i16_preds(i1 %x) { +; CHECK: cvt.u16.pred rh0, p1; +; CHECK: ret; + %a = zext i1 %x to i16 + ret i16 %a +} + +define ptx_device i16 @cvt_i16_i32(i32 %x) { +; CHECK: cvt.u16.u32 rh0, r1; +; CHECK: ret; + %a = trunc i32 %x to i16 + ret i16 %a +} + +define ptx_device i16 @cvt_i16_i64(i64 %x) { +; CHECK: cvt.u16.u64 rh0, rd1; +; CHECK: ret; + %a = trunc i64 %x to i16 + ret i16 %a +} + +define ptx_device i16 @cvt_i16_f32(float %x) { +; CHECK: cvt.rni.u16.f32 rh0, f1; +; CHECK: ret; + %a = fptoui float %x to i16 + ret i16 %a +} + +define ptx_device i16 @cvt_i16_f64(double %x) { +; CHECK: cvt.rni.u16.f64 rh0, fd1; +; CHECK: ret; + %a = fptoui double %x to i16 + ret i16 %a +} + +; i32 + +define ptx_device i32 @cvt_i32_preds(i1 %x) { +; CHECK: cvt.u32.pred r0, p1; +; CHECK: ret; + %a = zext i1 %x to i32 + ret i32 %a +} + +define ptx_device i32 @cvt_i32_i16(i16 %x) { +; CHECK: cvt.u32.u16 r0, rh1; +; CHECK: ret; + %a = zext i16 %x to i32 + ret i32 %a +} + +define ptx_device i32 @cvt_i32_i64(i64 %x) { +; CHECK: cvt.u32.u64 r0, rd1; +; CHECK: ret; + %a = trunc i64 %x to i32 + ret i32 %a +} + +define ptx_device i32 @cvt_i32_f32(float %x) { +; CHECK: cvt.rni.u32.f32 r0, f1; +; CHECK: ret; + %a = fptoui float %x to i32 + ret i32 %a +} + +define ptx_device i32 @cvt_i32_f64(double %x) { +; CHECK: cvt.rni.u32.f64 r0, fd1; +; CHECK: ret; + %a = fptoui double %x to i32 + ret i32 %a +} + +; i64 + +define ptx_device i64 @cvt_i64_preds(i1 %x) { +; CHECK: cvt.u64.pred rd0, p1; +; CHECK: ret; + %a = zext i1 %x to i64 + ret i64 %a +} + +define ptx_device i64 @cvt_i64_i16(i16 %x) { +; CHECK: cvt.u64.u16 rd0, rh1; +; CHECK: ret; + %a = zext i16 %x to i64 + ret i64 %a +} + +define ptx_device i64 @cvt_i64_i32(i32 %x) { +; CHECK: cvt.u64.u32 rd0, r1; +; CHECK: ret; + %a = zext i32 %x to i64 + ret i64 %a +} + +define ptx_device i64 @cvt_i64_f32(float %x) { +; CHECK: cvt.rni.u64.f32 rd0, f1; +; CHECK: ret; + %a = fptoui float %x to i64 + ret i64 %a +} + +define ptx_device i64 @cvt_i64_f64(double %x) { +; CHECK: cvt.rni.u64.f64 rd0, fd1; +; CHECK: ret; + %a = fptoui double %x to i64 + ret i64 %a +} + +; f32 + +define ptx_device float @cvt_f32_preds(i1 %x) { +; CHECK: cvt.rn.f32.pred f0, p1; +; CHECK: ret; + %a = uitofp i1 %x to float + ret float %a +} + +define ptx_device float @cvt_f32_i16(i16 %x) { +; CHECK: cvt.rn.f32.u16 f0, rh1; +; CHECK: ret; + %a = uitofp i16 %x to float + ret float %a +} + +define ptx_device float @cvt_f32_i32(i32 %x) { +; CHECK: cvt.rn.f32.u32 f0, r1; +; CHECK: ret; + %a = uitofp i32 %x to float + ret float %a +} + +define ptx_device float @cvt_f32_i64(i64 %x) { +; CHECK: cvt.rn.f32.u64 f0, rd1; +; CHECK: ret; + %a = uitofp i64 %x to float + ret float %a +} + +define ptx_device float @cvt_f32_f64(double %x) { +; CHECK: cvt.rn.f32.f64 f0, fd1; +; CHECK: ret; + %a = fptrunc double %x to float + ret float %a +} + +; f64 + +define ptx_device double @cvt_f64_preds(i1 %x) { +; CHECK: cvt.rn.f64.pred fd0, p1; +; CHECK: ret; + %a = uitofp i1 %x to double + ret double %a +} + +define ptx_device double @cvt_f64_i16(i16 %x) { +; CHECK: cvt.rn.f64.u16 fd0, rh1; +; CHECK: ret; + %a = uitofp i16 %x to double + ret double %a +} + +define ptx_device double @cvt_f64_i32(i32 %x) { +; CHECK: cvt.rn.f64.u32 fd0, r1; +; CHECK: ret; + %a = uitofp i32 %x to double + ret double %a +} + +define ptx_device double @cvt_f64_i64(i64 %x) { +; CHECK: cvt.rn.f64.u64 fd0, rd1; +; CHECK: ret; + %a = uitofp i64 %x to double + ret double %a +} + +define ptx_device double @cvt_f64_f32(float %x) { +; CHECK: cvt.f64.f32 fd0, f1; +; CHECK: ret; + %a = fpext float %x to double + ret double %a +} diff --git a/test/CodeGen/PTX/fneg.ll b/test/CodeGen/PTX/fneg.ll new file mode 100644 index 0000000000..22eeda3f0c --- /dev/null +++ b/test/CodeGen/PTX/fneg.ll @@ -0,0 +1,15 @@ +; RUN: llc < %s -march=ptx32 | FileCheck %s + +define ptx_device float @t1_f32(float %x) { +; CHECK: neg.f32 f0, f1; +; CHECK-NEXT: ret; + %y = fsub float -0.000000e+00, %x + ret float %y +} + +define ptx_device double @t1_f64(double %x) { +; CHECK: neg.f64 fd0, fd1; +; CHECK-NEXT: ret; + %y = fsub double -0.000000e+00, %x + ret double %y +} diff --git a/test/CodeGen/PTX/selp.ll b/test/CodeGen/PTX/selp.ll new file mode 100644 index 0000000000..6f1b03e599 --- /dev/null +++ b/test/CodeGen/PTX/selp.ll @@ -0,0 +1,25 @@ +; RUN: llc < %s -march=ptx32 | FileCheck %s + +define ptx_device i32 @test_selp_i32(i1 %x, i32 %y, i32 %z) { +; CHECK: selp.u32 r0, r1, r2, p1; + %a = select i1 %x, i32 %y, i32 %z + ret i32 %a +} + +define ptx_device i64 @test_selp_i64(i1 %x, i64 %y, i64 %z) { +; CHECK: selp.u64 rd0, rd1, rd2, p1; + %a = select i1 %x, i64 %y, i64 %z + ret i64 %a +} + +define ptx_device float @test_selp_f32(i1 %x, float %y, float %z) { +; CHECK: selp.f32 f0, f1, f2, p1; + %a = select i1 %x, float %y, float %z + ret float %a +} + +define ptx_device double @test_selp_f64(i1 %x, double %y, double %z) { +; CHECK: selp.f64 fd0, fd1, fd2, p1; + %a = select i1 %x, double %y, double %z + ret double %a +} -- cgit v1.2.3-18-g5258