From 99534bb81a0d945edd61d4db17549bde8449f94c Mon Sep 17 00:00:00 2001 From: Kalle Raiskila Date: Mon, 9 Aug 2010 16:33:00 +0000 Subject: Have SPU handle halfvec stores aligned by 8 bytes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110576 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/CellSPU/bigstack.ll | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'test/CodeGen/CellSPU/bigstack.ll') diff --git a/test/CodeGen/CellSPU/bigstack.ll b/test/CodeGen/CellSPU/bigstack.ll index 5483f46373..63293e2aec 100644 --- a/test/CodeGen/CellSPU/bigstack.ll +++ b/test/CodeGen/CellSPU/bigstack.ll @@ -1,7 +1,7 @@ ; RUN: llc < %s -march=cellspu -o %t1.s -; RUN: grep lqx %t1.s | count 4 -; RUN: grep il %t1.s | grep -v file | count 7 -; RUN: grep stqx %t1.s | count 2 +; RUN: grep lqx %t1.s | count 3 +; RUN: grep il %t1.s | grep -v file | count 5 +; RUN: grep stqx %t1.s | count 1 define i32 @bigstack() nounwind { entry: -- cgit v1.2.3-70-g09d2