From 3501feab811c86c9659248a4875fc31a3165f84d Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Tue, 14 Jan 2003 22:00:31 +0000 Subject: Rename MachineInstrInfo -> TargetInstrInfo git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5272 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/InstSelectSimple.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'lib/Target/X86/InstSelectSimple.cpp') diff --git a/lib/Target/X86/InstSelectSimple.cpp b/lib/Target/X86/InstSelectSimple.cpp index 43f25325e8..ee8318f22d 100644 --- a/lib/Target/X86/InstSelectSimple.cpp +++ b/lib/Target/X86/InstSelectSimple.cpp @@ -437,7 +437,7 @@ void ISel::LoadArgumentsToVirtualRegs(Function &Fn) { /// the current one. /// void ISel::SelectPHINodes() { - const MachineInstrInfo &MII = TM.getInstrInfo(); + const TargetInstrInfo &TII = TM.getInstrInfo(); const Function &LF = *F->getFunction(); // The LLVM function... for (Function::const_iterator I = LF.begin(), E = LF.end(); I != E; ++I) { const BasicBlock *BB = I; @@ -468,7 +468,7 @@ void ISel::SelectPHINodes() { // MachineBasicBlock::iterator PI = PredMBB->end(); while (PI != PredMBB->begin() && - MII.isTerminatorInstr((*(PI-1))->getOpcode())) + TII.isTerminatorInstr((*(PI-1))->getOpcode())) --PI; unsigned ValReg = getReg(PN->getIncomingValue(i), PredMBB, PI); PhiMI->addRegOperand(ValReg); -- cgit v1.2.3-70-g09d2