From 420761a0f193e87d08ee1c51b26bba23ab4bac7f Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Fri, 20 Apr 2012 07:30:17 +0000 Subject: Convert more uses of XXXRegisterClass to &XXXRegClass. No functional change since they are equivalent. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155188 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/Mips/MipsMachineFunction.cpp | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'lib/Target/Mips/MipsMachineFunction.cpp') diff --git a/lib/Target/Mips/MipsMachineFunction.cpp b/lib/Target/Mips/MipsMachineFunction.cpp index b00c62b09f..9d3a27b518 100644 --- a/lib/Target/Mips/MipsMachineFunction.cpp +++ b/lib/Target/Mips/MipsMachineFunction.cpp @@ -40,9 +40,9 @@ unsigned MipsFunctionInfo::getGlobalBaseReg() { if (FixGlobalBaseReg) // $gp is the global base register. return GlobalBaseReg = ST.isABI_N64() ? Mips::GP_64 : Mips::GP; - const TargetRegisterClass *RC; - RC = ST.isABI_N64() ? - Mips::CPU64RegsRegisterClass : Mips::CPURegsRegisterClass; + const TargetRegisterClass *RC = ST.isABI_N64() ? + (const TargetRegisterClass*)&Mips::CPU64RegsRegClass : + (const TargetRegisterClass*)&Mips::CPURegsRegClass; return GlobalBaseReg = MF.getRegInfo().createVirtualRegister(RC); } -- cgit v1.2.3-70-g09d2