From 44ee4714a8c245d4fdfd03840efcf58c3f66c6bc Mon Sep 17 00:00:00 2001 From: Evan Cheng Date: Wed, 9 Nov 2011 01:57:03 +0000 Subject: Hide cpu name checking in ARMSubtarget. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144154 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/ARM/ARMLoadStoreOptimizer.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'lib/Target/ARM/ARMLoadStoreOptimizer.cpp') diff --git a/lib/Target/ARM/ARMLoadStoreOptimizer.cpp b/lib/Target/ARM/ARMLoadStoreOptimizer.cpp index a871ed7d44..4c3be89b3e 100644 --- a/lib/Target/ARM/ARMLoadStoreOptimizer.cpp +++ b/lib/Target/ARM/ARMLoadStoreOptimizer.cpp @@ -1080,7 +1080,7 @@ bool ARMLoadStoreOpt::FixInvalidRegPairOp(MachineBasicBlock &MBB, unsigned OddRegNum = TRI->getDwarfRegNum(OddReg, false); // ARM errata 602117: LDRD with base in list may result in incorrect base // register when interrupted or faulted. - bool Errata602117 = EvenReg == BaseReg && STI->getCPUString() == "cortex-m3"; + bool Errata602117 = EvenReg == BaseReg && STI->isCortexM3(); if (!Errata602117 && ((EvenRegNum & 1) == 0 && (EvenRegNum + 1) == OddRegNum)) return false; -- cgit v1.2.3-70-g09d2