From dff84b03258514463ede477af38f1246b95b0cd0 Mon Sep 17 00:00:00 2001 From: Jim Grosbach Date: Thu, 2 Dec 2010 00:28:45 +0000 Subject: Add support for binary encoding of ARM 'adr' instructions referencing constant pool entries (LEApcrel pseudo). Ongoing saga of rdar://8542291. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120635 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/MC/MachObjectWriter.cpp | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) (limited to 'lib/MC/MachObjectWriter.cpp') diff --git a/lib/MC/MachObjectWriter.cpp b/lib/MC/MachObjectWriter.cpp index 45d2ff7491..60b38dc521 100644 --- a/lib/MC/MachObjectWriter.cpp +++ b/lib/MC/MachObjectWriter.cpp @@ -31,7 +31,12 @@ using namespace llvm::object; // FIXME: this has been copied from (or to) X86AsmBackend.cpp static unsigned getFixupKindLog2Size(unsigned Kind) { switch (Kind) { - default: llvm_unreachable("invalid fixup kind!"); + // FIXME: Until ARM has it's own relocation stuff spun off, it comes + // through here and we don't want it to puke all over. Any reasonable + // values will only come when ARM relocation support gets added, at which + // point this will be X86 only again and the llvm_unreachable can be + // re-enabled. + default: return 0;// llvm_unreachable("invalid fixup kind!"); case FK_PCRel_1: case FK_Data_1: return 0; case FK_PCRel_2: -- cgit v1.2.3-18-g5258