From 0db841f9c2b9a25fb5ecb36e350d3a802c35654c Mon Sep 17 00:00:00 2001 From: Jakob Stoklund Olesen Date: Thu, 17 Feb 2011 22:53:48 +0000 Subject: Add basic register allocator statistics. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125789 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/RegAllocBasic.cpp | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'lib/CodeGen/RegAllocBasic.cpp') diff --git a/lib/CodeGen/RegAllocBasic.cpp b/lib/CodeGen/RegAllocBasic.cpp index 7fbb035ed6..c0d4d8146a 100644 --- a/lib/CodeGen/RegAllocBasic.cpp +++ b/lib/CodeGen/RegAllocBasic.cpp @@ -20,6 +20,7 @@ #include "VirtRegMap.h" #include "VirtRegRewriter.h" #include "llvm/ADT/OwningPtr.h" +#include "llvm/ADT/Statistic.h" #include "llvm/Analysis/AliasAnalysis.h" #include "llvm/Function.h" #include "llvm/PassAnalysisSupport.h" @@ -48,6 +49,10 @@ using namespace llvm; +STATISTIC(NumAssigned , "Number of registers assigned"); +STATISTIC(NumUnassigned , "Number of registers unassigned"); +STATISTIC(NumNewQueued , "Number of new live ranges queued"); + static RegisterRegAlloc basicRegAlloc("basic", "basic register allocator", createBasicRegisterAllocator); @@ -242,12 +247,14 @@ void RegAllocBase::assign(LiveInterval &VirtReg, unsigned PhysReg) { assert(!VRM->hasPhys(VirtReg.reg) && "Duplicate VirtReg assignment"); VRM->assignVirt2Phys(VirtReg.reg, PhysReg); PhysReg2LiveUnion[PhysReg].unify(VirtReg); + ++NumAssigned; } void RegAllocBase::unassign(LiveInterval &VirtReg, unsigned PhysReg) { assert(VRM->getPhys(VirtReg.reg) == PhysReg && "Inconsistent unassign"); PhysReg2LiveUnion[PhysReg].extract(VirtReg); VRM->clearVirt(VirtReg.reg); + ++NumUnassigned; } // Top-level driver to manage the queue of unassigned VirtRegs and call the @@ -287,6 +294,7 @@ void RegAllocBase::allocatePhysRegs() { "expect split value in virtual register"); VirtRegQ.push(std::make_pair(getPriority(SplitVirtReg), SplitVirtReg->reg)); + ++NumNewQueued; } } } -- cgit v1.2.3-18-g5258