From 770bcc7b15adbc978800db70dbb1c3c22913b52c Mon Sep 17 00:00:00 2001 From: Evan Cheng Date: Fri, 6 Feb 2009 17:43:24 +0000 Subject: Move getPointerRegClass from TargetInstrInfo to TargetRegisterInfo. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63938 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/PostRASchedulerList.cpp | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) (limited to 'lib/CodeGen/PostRASchedulerList.cpp') diff --git a/lib/CodeGen/PostRASchedulerList.cpp b/lib/CodeGen/PostRASchedulerList.cpp index 46f89f2d34..94b6be19fb 100644 --- a/lib/CodeGen/PostRASchedulerList.cpp +++ b/lib/CodeGen/PostRASchedulerList.cpp @@ -237,12 +237,11 @@ void SchedulePostRATDList::Schedule() { /// instruction of the specified TargetInstrDesc. static const TargetRegisterClass* getInstrOperandRegClass(const TargetRegisterInfo *TRI, - const TargetInstrInfo *TII, const TargetInstrDesc &II, - unsigned Op) { + const TargetInstrDesc &II, unsigned Op) { if (Op >= II.getNumOperands()) return NULL; if (II.OpInfo[Op].isLookupPtrRegClass()) - return TII->getPointerRegClass(); + return TRI->getPointerRegClass(); return TRI->getRegClass(II.OpInfo[Op].RegClass); } @@ -490,7 +489,7 @@ bool SchedulePostRATDList::BreakAntiDependencies() { unsigned Reg = MO.getReg(); if (Reg == 0) continue; const TargetRegisterClass *NewRC = - getInstrOperandRegClass(TRI, TII, MI->getDesc(), i); + getInstrOperandRegClass(TRI, MI->getDesc(), i); // If this instruction has a use of AntiDepReg, breaking it // is invalid. @@ -625,7 +624,7 @@ bool SchedulePostRATDList::BreakAntiDependencies() { if (!MO.isUse()) continue; const TargetRegisterClass *NewRC = - getInstrOperandRegClass(TRI, TII, MI->getDesc(), i); + getInstrOperandRegClass(TRI, MI->getDesc(), i); // For now, only allow the register to be changed if its register // class is consistent across all uses. -- cgit v1.2.3-18-g5258