From eeb57c7701ded683d660ed616966cfe7b1750337 Mon Sep 17 00:00:00 2001 From: Jakob Stoklund Olesen Date: Fri, 29 Jul 2011 23:36:21 +0000 Subject: Don't check liveness of unallocatable registers. This includes registers like EFLAGS and ST0-ST7. We don't check for liveness issues in the verifier and scavenger because registers will never be allocated from these classes. While in SSA form, we do care about the liveness of unallocatable unreserved registers. Liveness of EFLAGS and ST0 neds to be correct for MachineDCE and MachineSinking. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136541 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/MachineVerifier.cpp | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) (limited to 'lib/CodeGen/MachineVerifier.cpp') diff --git a/lib/CodeGen/MachineVerifier.cpp b/lib/CodeGen/MachineVerifier.cpp index 8541d18ef3..f798c1346e 100644 --- a/lib/CodeGen/MachineVerifier.cpp +++ b/lib/CodeGen/MachineVerifier.cpp @@ -664,8 +664,15 @@ MachineVerifier::visitMachineOperand(const MachineOperand *MO, unsigned MONum) { // Use of a dead register. if (!regsLive.count(Reg)) { if (TargetRegisterInfo::isPhysicalRegister(Reg)) { - // Reserved registers may be used even when 'dead'. - if (!isReserved(Reg)) + // Reserved registers may be used even when 'dead', but allocatable + // registers can't. + // We track the liveness of unreserved, unallocatable registers while + // the machine function is still in SSA form. That lets us check for + // bad EFLAGS uses. After register allocation, the unallocatable + // registers are probably quite wrong. For example, the x87 ST0-ST7 + // registers don't track liveness at all. + if (!isReserved(Reg) && + (MRI->isSSA() || TRI->isInAllocatableClass(Reg))) report("Using an undefined physical register", MO, MONum); } else { BBInfo &MInfo = MBBInfoMap[MI->getParent()]; -- cgit v1.2.3-70-g09d2