From bf4699c56100a0184bbe4fb53937c7204ca1ceb0 Mon Sep 17 00:00:00 2001 From: Jakob Stoklund Olesen Date: Wed, 6 Oct 2010 23:54:39 +0000 Subject: Add MachineRegisterInfo::constrainRegClass and use it in MachineCSE. This function is intended to be used when inserting a machine instruction that trivially restricts the legal registers, like LEA requiring a GR32_NOSP argument. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115875 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/MachineRegisterInfo.cpp | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'lib/CodeGen/MachineRegisterInfo.cpp') diff --git a/lib/CodeGen/MachineRegisterInfo.cpp b/lib/CodeGen/MachineRegisterInfo.cpp index 5d852f26be..7b839f07e7 100644 --- a/lib/CodeGen/MachineRegisterInfo.cpp +++ b/lib/CodeGen/MachineRegisterInfo.cpp @@ -60,6 +60,20 @@ MachineRegisterInfo::setRegClass(unsigned Reg, const TargetRegisterClass *RC) { RegClass2VRegMap[RC->getID()].push_back(VR); } +const TargetRegisterClass * +MachineRegisterInfo::constrainRegClass(unsigned Reg, + const TargetRegisterClass *RC) { + const TargetRegisterClass *OldRC = getRegClass(Reg); + if (OldRC == RC) + return RC; + const TargetRegisterClass *NewRC = getCommonSubClass(OldRC, RC); + if (!NewRC) + return 0; + if (NewRC != OldRC) + setRegClass(Reg, NewRC); + return NewRC; +} + /// createVirtualRegister - Create and return a new virtual register in the /// function with the specified register class. /// -- cgit v1.2.3-70-g09d2