From fb9ebbf236974beac31705eaeb9f50ab585af6ab Mon Sep 17 00:00:00 2001 From: Jakob Stoklund Olesen Date: Mon, 15 Oct 2012 21:57:41 +0000 Subject: Switch most getReservedRegs() clients to the MRI equivalent. Using the cached bit vector in MRI avoids comstantly allocating and recomputing the reserved register bit vector. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165983 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/MachineCSE.cpp | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) (limited to 'lib/CodeGen/MachineCSE.cpp') diff --git a/lib/CodeGen/MachineCSE.cpp b/lib/CodeGen/MachineCSE.cpp index 896461fd19..15519c105c 100644 --- a/lib/CodeGen/MachineCSE.cpp +++ b/lib/CodeGen/MachineCSE.cpp @@ -64,7 +64,6 @@ namespace { ScopeMap.clear(); Exps.clear(); AllocatableRegs.clear(); - ReservedRegs.clear(); } private: @@ -79,7 +78,6 @@ namespace { SmallVector Exps; unsigned CurrVN; BitVector AllocatableRegs; - BitVector ReservedRegs; bool PerformTrivialCoalescing(MachineInstr *MI, MachineBasicBlock *MBB); bool isPhysDefTriviallyDead(unsigned Reg, @@ -242,7 +240,7 @@ bool MachineCSE::PhysRegDefsReach(MachineInstr *CSMI, MachineInstr *MI, return false; for (unsigned i = 0, e = PhysDefs.size(); i != e; ++i) { - if (AllocatableRegs.test(PhysDefs[i]) || ReservedRegs.test(PhysDefs[i])) + if (MRI->isAllocatable(PhysDefs[i]) || MRI->isReserved(PhysDefs[i])) // Avoid extending live range of physical registers if they are //allocatable or reserved. return false; @@ -636,6 +634,5 @@ bool MachineCSE::runOnMachineFunction(MachineFunction &MF) { AA = &getAnalysis(); DT = &getAnalysis(); AllocatableRegs = TRI->getAllocatableSet(MF); - ReservedRegs = TRI->getReservedRegs(MF); return PerformCSE(DT->getRootNode()); } -- cgit v1.2.3-70-g09d2