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2013-03-21Add TableGen ctags(1) emitter and helper script.Sean Silva
To use this in conjunction with exuberant ctags to generate a single combined tags file, run tblgen first and then $ ctags --append [...] Since some identifiers have corresponding definitions in C++ code, it can be useful (if using vim) to also use cscope, and :set cscopetagorder=1 so that :tag X will preferentially select the tablegen symbol, while :cscope find g X will always find the C++ symbol. Patch by Kevin Schoedel! (a couple small formatting changes courtesy of clang-format) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177682 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-20[lit] Avoid CRLFs in bash scripts on WindowsReid Kleckner
Native Windows Python will do line ending translation by default, which we don't want in bash scripts. If we're not native Windows Python, then 'b' is ignored. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177602 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-19Extend TableGen instruction selection matcher to improve handlingUlrich Weigand
of complex instruction operands (e.g. address modes). Currently, if a Pat pattern creates an instruction that has a complex operand (i.e. one that consists of multiple sub-operands at the MI level), this operand must match a ComplexPattern DAG pattern with the correct number of output operands. This commit extends TableGen to alternatively allow match a complex operands against multiple separate operands at the DAG level. This allows using Pat patterns to match pre-increment nodes like pre_store (which must have separate operands at the DAG level) onto an instruction pattern that uses a multi-operand memory operand, like the following example on PowerPC (will be committed as a follow-on patch): def STWU : DForm_1<37, (outs ptr_rc:$ea_res), (ins GPRC:$rS, memri:$dst), "stwu $rS, $dst", LdStStoreUpd, []>, RegConstraint<"$dst.reg = $ea_res">, NoEncode<"$ea_res">; def : Pat<(pre_store GPRC:$rS, ptr_rc:$ptrreg, iaddroff:$ptroff), (STWU GPRC:$rS, iaddroff:$ptroff, ptr_rc:$ptrreg)>; Here, the pair of "ptroff" and "ptrreg" operands is matched onto the complex operand "dst" of class "memri" in the "STWU" instruction. Approved by Jakob Stoklund Olesen. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177428 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-18TableGen fix for the new machine model.Andrew Trick
Properly handle cases where a group of instructions have different SchedRW lists with the same itinerary class. This was supposed to work, but I left in an early break. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177317 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-18Extract a method.Jakob Stoklund Olesen
This computes the type of an instruction operand or result based on the records in the instruction's ins and outs lists. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177244 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-17Use ArrayRef<MVT::SimpleValueType> when possible.Jakob Stoklund Olesen
Not passing vector references around makes it possible to use SmallVector in most places. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177235 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-16Machine model. Allow mixed itinerary classes and SchedRW lists.Andrew Trick
We always supported a mixture of the old itinerary model and new per-operand model, but it required a level of indirection to map itinerary classes to SchedRW lists. This was done for ARM A9. Now we want to define x86 SchedRW lists, with the goal of removing its itinerary classes, but still support the itineraries in the mean time. When I original developed the model, Atom did not have itineraries, so there was no reason to expect this requirement. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177226 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-15Add SchedRW as an Instruction field.Jakob Stoklund Olesen
Don't require instructions to inherit Sched<...>. Sometimes it is more convenient to say: let SchedRW = ... in { ... } Which is now possible. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177199 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-14Fix r177112: Add ProcResGroup.Andrew Trick
This is the other half of r177122 that I meant to commit at the same time. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177123 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-14MachineModel: Add a ProcResGroup class.Andrew Trick
This allows abitrary groups of processor resources. Using something in a subset automatically counts againts the superset. Currently, this only works if the superset is also a ProcResGroup as opposed to a SuperUnit. This allows SandyBridge to be expressed naturally, which will be checked in shortly. def SBPort01 : ProcResGroup<[SBPort0, SBPort1]>; def SBPort15 : ProcResGroup<[SBPort1, SBPort5]>; def SBPort23 : ProcResGroup<[SBPort2, SBPort3]>; def SBPort015 : ProcResGroup<[SBPort0, SBPort1, SBPort5]>; git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177112 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-13lit.TestFormats.GoogleTest: Honor LitConfig.noExecute, or --no-execute were ↵NAKAMURA Takumi
ignored. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176930 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-11Fixes disassembler crashes on 2013 Haswell RTM instructions.Kevin Enderby
rdar://13318048 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176828 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-01MIsched machine model: tablegen subtarget emitter improvement.Andrew Trick
Fix the way resources are counted. I'm taking some time to cleanup the way MachineScheduler handles in-order machine resources. Eventually we'll need more PPC/Atom test cases in tree. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176390 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-28Enable syntax highlighting for reStructuredText files.Bill Wendling
Patch by Journeyer J. Joh! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176235 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-26[TableGen] Fix ICE on MSVC 2012 Release builds.Michael J. Spencer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176125 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-26Unify clang/llvm attributes for asan/tsan/msan (LLVM part)Kostya Serebryany
These are two related changes (one in llvm, one in clang). LLVM: - rename address_safety => sanitize_address (the enum value is the same, so we preserve binary compatibility with old bitcode) - rename thread_safety => sanitize_thread - rename no_uninitialized_checks -> sanitize_memory CLANG: - add __attribute__((no_sanitize_address)) as a synonym for __attribute__((no_address_safety_analysis)) - add __attribute__((no_sanitize_thread)) - add __attribute__((no_sanitize_memory)) for S in address thread memory If -fsanitize=S is present and __attribute__((no_sanitize_S)) is not set llvm attribute sanitize_S git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176075 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-25'Hexadecimal' has two 'a's and only one 'i'.Matt Beaumont-Gay
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176031 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14Fix for bug 15246 -- out-of-bound error in the TableGen backend, ↵Jyotsna Verma
CodeGenMapTable.cpp. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175185 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-13PR14992 - Tablegen incorrectly converts ARM tLDMIA_UPD pseudo to tLDMIADavid Peixotto
Fixed bug in tablegen conversion when source pseudo instruction has a different number of arguments than the destination instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175066 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12Add static cast to unsigned char whenever a character classification ↵Guy Benyei
function is called with a signed char argument, in order to avoid assertions in Windows Debug configuration. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175006 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12Added 0x0D to 2-byte opcode extension table for prefetch* variantsKay Tiong Khoo
Fixed decode of existing 3dNow prefetchw instruction Intel is scheduled to add a compatible prefetchw (same encoding) to future CPUs git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174920 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11[tsan/msan] adding thread_safety and uninitialized_checks attributesKostya Serebryany
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174864 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-07[lit] Add a display function for lit.Test.TestResult.Daniel Dunbar
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174667 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-06Canonicalize line endings to Linux style also when the --strict-whitespace ↵Guy Benyei
flag is in use. This flag is supposed to affect horizontal whitespaces only. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174541 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-06Allow targets to add custom asm operand matching logic.Jim Grosbach
For example, ARM has several instructions with a literal '#0' immediate in the syntax that's not represented as an actual operand. The asm matcher is expected a token operand, but the parser will have created an immediate operand. This is currently handled by dedicated per-instruction C++ munging of the ParsedAsmOperand list, but will be better handled by this hook. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174487 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05Preprocess Apple llvmCore headers to reflect NDEBUG setting. <rdar://12568983>Bob Wilson
If an Apple llvmCore build is done without assertions, and a client uses the llvmCore headers with assertions enabled, or vice versa, then things will break because some of the structure sizes in the API are different. Use the unifdef tool to make the headers unconditionally match the way the llvmCore libraries were built. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174460 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05Set the deployment target for Apple llvmCore builds. <rdar://problem/12712431>Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174397 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05Fix commentsEli Bendersky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174390 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05This patch that sets the EmitAlias flag in td files Jack Carter
and enables the instruction printer to print aliased instructions. Due to usage of RegisterOperands a change in common code (utils/TableGen/AsmWriterEmitter.cpp) is required to get the correct register value if it is a RegisterOperand. Contributer: Vladimir Medic git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174358 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-01MachineModel: Inconsequential TableGen SubtargetEmitter fix.Andrew Trick
Drive by fix. I noticed some missing logic that might bite future users. This shouldn't affect the final output on currently modeled targets. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174142 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-31[lit] Add a test for internal shell execution behaviors.Daniel Dunbar
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174102 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-31[lit] Change to raise InternalShellError for all command execution issues.Daniel Dunbar
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174101 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-31[lit] Fix bug where InternalShellError messages were discarded.Daniel Dunbar
- Also, change the exit code to match 'sh'. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174089 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-31[lit] Fix a shell parsing bug with ';' not separated by whitespace.Daniel Dunbar
- Testing finds bugs, who knew. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174087 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-31[lit] Add a test for the various ShTest format features.Daniel Dunbar
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174072 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-31[lit] TestRunner: Eliminate failDueToStderr argument, which is now unused.Daniel Dunbar
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174071 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-31[lit] Delete the now-unused SyntaxCheckTest format.Daniel Dunbar
- Also, kill the pointless LitFormats module. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174070 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-31Clarify intent.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174068 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-31[MC] bundle alignment: prevent padding instructions from crossing bundle ↵Derek Schuff
boundaries git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174067 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-31Add AArch64 as an experimental target.Tim Northover
This patch adds support for AArch64 (ARM's 64-bit architecture) to LLVM in the "experimental" category. Currently, it won't be built unless requested explicitly. This initial commit should have support for: + Assembly of all scalar (i.e. non-NEON, non-Crypto) instructions (except the late addition CRC instructions). + CodeGen features required for C++03 and C99. + Compilation for the "small" memory model: code+static data < 4GB. + Absolute and position-independent code. + GNU-style (i.e. "__thread") TLS. + Debugging information. The principal omission, currently, is performance tuning. This patch excludes the NEON support also reviewed due to an outbreak of batshit insanity in our legal department. That will be committed soon bringing the changes to precisely what has been approved. Further reviews would be gratefully received. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174054 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-31[lit] Move unittest adaptor code into discovery module.Daniel Dunbar
- Also, add a test for it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174019 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-31[lit] Run the ShUtil tests as part of the test suite.Daniel Dunbar
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174018 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-31[lit] Set parallel mode for coverage tests.Daniel Dunbar
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174017 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-31[lit] Move discovery code into its own module.Daniel Dunbar
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174014 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-31[lit] Add a MANIFEST file and a script for sanity checking the source dist.Daniel Dunbar
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174002 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-31[lit] Add a basic discovery test.Daniel Dunbar
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174001 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-31[lit] Add a script for checking test coverage.Daniel Dunbar
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174000 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-31[lit] Add a test suite for lit itself.Daniel Dunbar
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173999 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-30[lit] Make GoogleTest test runner correctly discover tests in the source rootAlexey Samsonov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173907 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-30[lit] Add some TODO notes to myself.Daniel Dunbar
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173857 91177308-0d34-0410-b5e6-96231b3b80d8
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