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2012-01-17Intel syntax: Ignore mnemonic aliases.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148316 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-17Provide better messages in llvm_unreachable.David Blaikie
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148293 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-17Remove unreachable code. (replace with llvm_unreachable to help GCC where ↵David Blaikie
necessary) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148284 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-16Removing unused default switch cases in switches over enums that already ↵David Blaikie
account for all enumeration values explicitly. (This time I believe I've checked all the -Wreturn-type warnings from GCC & added the couple of llvm_unreachables necessary to silence them. If I've missed any, I'll happily fix them as soon as I know about them) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148262 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-13Skip the NAME field when forming tuples.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148147 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-13Delete CodeInit and CodeRecTy from TableGen.Jakob Stoklund Olesen
The code type was always identical to a string anyway. Now it is simply a synonym. The code literal syntax [{...}] is still valid. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148092 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-12Added MVT::v2f16Pete Cooper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148067 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-10Record asm variant id in MatchEntry and check it while matching instruction.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147858 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-10Remove unnecessary default cases in switches that cover all enum values.David Blaikie
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147855 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-09Use descriptive variable name and remove incorrect operand number check.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147802 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-09Split AsmParser into two components - AsmParser and AsmParserVariantDevang Patel
AsmParser holds info specific to target parser. AsmParserVariant holds info specific to asm variants supported by the target. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147787 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-07Remove VectorExtras. This unused helper was written for a type of API that ↵Benjamin Kramer
is discouraged now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147738 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-07Fix TableGen so that it will emit the correct signature for FastEmit_f:Cameron Zwarich
/// FastEmit_f - This method is called by target-independent code /// to request that an instruction with the given type, opcode, and /// floating-point immediate operand be emitted. virtual unsigned FastEmit_f(MVT VT, MVT RetVT, unsigned Opcode, const ConstantFP *FPImm); Currently, it emits an accidentally overloaded version without the const on the ConstantFP*. This doesn't affect anything in the tree, since nothing causes that method to be autogenerated, but I have been playing with some ARM TableGen refactorings that hit this problem. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147727 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-07Refactor.Devang Patel
Store AsmParser info locally. A small step towards emitting match entries for multiple asm variants. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147710 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-07Eliminate an error check that may not work with all asm syntax variants.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147708 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-05Do not hard code asm variant number.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147583 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-03Don't use enums larger than 1 << 31 for target features.Jakob Stoklund Olesen
Patch by Andy Zhang! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147491 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-30Add disassembler support for VPERMIL2PD and VPERMIL2PS.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147368 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-30Add FMA4 instructions to disassembler.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147367 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-22ARM VFP assembly parsing and encoding for VCVT(float <--> fixed point).Jim Grosbach
rdar://10558523 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147189 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-21ARM NEON VLD2 assembly parsing for structure to all lanes, non-writeback.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147025 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-20Fix up the CMake build for the new files added in r146960, they'reChandler Carruth
likely to stay either way that discussion ends up resolving itself. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146966 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-20Revert pragma clang suppressions that confuse GCC. (I'll worry about how to ↵David Blaikie
suppress/fix these problems properly when we figure out how to keep LLVM -Wweak-vtables clean) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146965 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-20Unweaken vtables as per ↵David Blaikie
http://llvm.org/docs/CodingStandards.html#ll_virtual_anch git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146960 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-20Add basic generic CodeGen support for half.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146927 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-19Emit a getMatchingSuperRegClass() implementation for every target.Jakob Stoklund Olesen
Use information computed while inferring new register classes to emit accurate, table-driven implementations of getMatchingSuperRegClass(). Delete the old manual, error-prone implementations in the targets. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146873 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-19Synthesize register classes for TRI::getMatchingSuperRegClass().Jakob Stoklund Olesen
Teach TableGen to create the missing register classes needed for getMatchingSuperRegClass() to return maximal results. The function is still not auto-generated, so it still returns inexact results. This produces these new register classes: ARM: QQPR_with_dsub_0_in_DPR_8 QQQQPR_with_dsub_0_in_DPR_8 X86: GR64_with_sub_32bit_in_GR32_NOAX GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOSP GR64_with_sub_16bit_in_GR16_NOREX GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREX GR64_TC_and_GR64_with_sub_32bit_in_GR32_NOAX GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREX_NOSP GR64_TCW64_and_GR64_with_sub_32bit_in_GR32_NOAX GR64_TC_and_GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREX GR64_with_sub_32bit_in_GR32_TC GR64_with_sub_32bit_in_GR32_ABCD_and_GR32_NOAX GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_TC GR64_with_sub_32bit_in_GR32_AD GR64_with_sub_32bit_in_GR32_AD_and_GR32_NOAX The other targets in the tree are not weird enough to be affected. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146872 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-16Extract a method. No functional change.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146713 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-15Use the proper comparator for set_intersection.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146674 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-15Synthesize missing register class intersections.Jakob Stoklund Olesen
The function TRI::getCommonSubClass(A, B) returns the largest common sub-class of the register classes A and B. This patch teaches TableGen to synthesize sub-classes such that the answer is always maximal. In other words, every register that is in both A and B will also be present in getCommonSubClass(A, B). This introduces these synthetic register classes: ARM: GPRnopc_and_hGPR GPRnopc_and_hGPR hGPR_and_rGPR GPRnopc_and_hGPR GPRnopc_and_hGPR hGPR_and_rGPR tGPR_and_tcGPR hGPR_and_tcGPR X86: GR32_NOAX_and_GR32_NOSP GR32_NOAX_and_GR32_NOREX GR64_NOSP_and_GR64_TC GR64_NOSP_and_GR64_TC GR64_NOREX_and_GR64_TC GR32_NOAX_and_GR32_NOSP GR32_NOAX_and_GR32_NOREX GR32_NOAX_and_GR32_NOREX_NOSP GR64_NOSP_and_GR64_TC GR64_NOREX_and_GR64_TC GR64_NOREX_NOSP_and_GR64_TC GR32_NOAX_and_GR32_NOSP GR32_NOAX_and_GR32_NOREX GR32_NOAX_and_GR32_NOREX_NOSP GR32_ABCD_and_GR32_NOAX GR32_NOAX_and_GR32_NOSP GR32_NOAX_and_GR32_NOREX GR32_NOAX_and_GR32_NOREX_NOSP GR32_ABCD_and_GR32_NOAX GR32_NOAX_and_GR32_TC GR32_NOAX_and_GR32_NOSP GR64_NOSP_and_GR64_TC GR32_NOAX_and_GR32_NOREX GR32_NOAX_and_GR32_NOREX_NOSP GR64_NOREX_and_GR64_TC GR64_NOREX_NOSP_and_GR64_TC GR32_ABCD_and_GR32_NOAX GR64_ABCD_and_GR64_TC GR32_NOAX_and_GR32_TC GR32_AD_and_GR32_NOAX Other targets are unaffected. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146657 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-12LLVMBuild: Remove trailing newline, which irked me.Daniel Dunbar
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146409 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-12Extract a method.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146374 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07ARM: NEON SHLL instruction immediate operand range checking.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146003 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06Extend AsmMatcher token literal matching to allow aliasing.Jim Grosbach
For example, ARM allows: vmov.u32 s4, #0 -> vmov.i32, #0 'u32' is a more specific designator for the 32-bit integer type specifier and is legal for any instruction which accepts 'i32' as a datatype suffix. We want to say, def : TokenAlias<".u32", ".i32">; This works by marking the match class of 'From' as a subclass of the match class of 'To'. rdar://10435076 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145992 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06First chunk of MachineInstr bundle support.Evan Cheng
1. Added opcode BUNDLE 2. Taught MachineInstr class to deal with bundled MIs 3. Changed MachineBasicBlock iterator to skip over bundled MIs; added an iterator to walk all the MIs 4. Taught MachineBasicBlock methods about bundled MIs git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145975 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06Tidy up. Fix naming convention stuff for some internal functions.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145974 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06use space star instead of star spaceSebastian Pop
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145944 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06add missing point at the end of sentencesSebastian Pop
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145943 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-02ARM NEON VEXT aliases for data type suffices.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145726 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-01TableGen: fix CMake build s'moreDylan Noblesmith
Oops, missed another missing file from r145629. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145636 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-01Add a deterministic finite automaton based packetizer for VLIW architecturesAnshuman Dasgupta
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145629 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-30Replace an assert() with an actual diagnostic.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145535 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-30ARM parsing for VLD1 two register all lanes, no writeback.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145504 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-30llvm_unreachable() is not for user diagnostics....Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145465 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-30ARM parsing aliases for VLD1 single register all lanes.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145464 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-19Remove some unnecessary filtering checks from X86 disassembler table build.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144986 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-16Rename MVT::untyped to MVT::Untyped to match similar nomenclature.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144747 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15Add vmov.f32 to materialize f32 immediate splats which cannot be handled byEvan Cheng
integer variants. rdar://10437054 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144608 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15ARM parsing datatype suffix variants for fixed-writeback VLD1/VST1 instructions.Jim Grosbach
rdar://10435076 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144606 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15Tidy up. Formatting.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144598 91177308-0d34-0410-b5e6-96231b3b80d8
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