aboutsummaryrefslogtreecommitdiff
path: root/utils/TableGen
AgeCommit message (Collapse)Author
2012-03-23Include cstdio in a few place that depended on getting it transitively ↵Benjamin Kramer
through StringExtras.h git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153328 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-20Reserve number of MI operands to accom,odate complex patterns.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153125 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-16More const-correcting of FixedLenDecoderEmitter.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152906 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-16Const-correct the FixedLenDecoderEmitter. Pass a few things by const ↵Craig Topper
reference instead of value to avoid some copying. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152899 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-16Spacing fixes. Mostly aligning arguments that spilled onto next line with ↵Craig Topper
the opening parenthese instead of 2 spaces in. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152889 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-16Remove unused field NumVariable from Filter class. Even it was needed the ↵Craig Topper
same result could be found with VariableInstructions.size(). Also fix some typos in comments. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152885 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-15Make MnemonicTable const again. That part of r152202 was OK.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152840 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-15Don't assume all mnemonics fit in 64k.Jakob Stoklund Olesen
We currently assume that all targets have less than 64k opcodes. We shouldn't limit it further. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152833 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-15Revert r152202: "Use uint16_t to store InstrNameIndices in MCInstrInfo."Jakob Stoklund Olesen
We cannot limit the concatenated instruction names to 64K. ARM is already at 32K, and it is easy to imagine a target with more instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152817 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-15Revert r152105: "Use uint16_t to store indices into string table"Jakob Stoklund Olesen
This patch limited the concatenated register names to 64K which meant that the total number of registers was many times less than 64K. If any compilers actually enforce the 64K limit on string literals, and it turns out to be a problem, we should fix that problem by not using long string literals. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152816 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-13Remove unused field from FixedLenDecoderEmitter. Move NumberedInstructions ↵Craig Topper
declaration from class to run method since its only used there and was being reinitialized anyway. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152616 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-12DFAPacketizerEmitter: Prune includes.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152581 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-11Convert more static tables of registers used by calling convention to ↵Craig Topper
uint16_t to reduce space. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152538 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-11Shrink and reorder some fields in MCOperandInfo to fit it in 8 bytes to ↵Craig Topper
reduce size of static tables. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152524 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-09Fix the x86 disassembler to at least print the lock prefix if it is the firstKevin Enderby
prefix. Added a FIXME to remind us this still does not work when it is not the first prefix. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152414 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-09TableGen/CodeEmitterGen.cpp: Fix an expression of generating bitmask.NAKAMURA Takumi
~0U might be i32 on 32-bit hosts, then (uint64_t)~0U might not be expected as (i64)0xFFFFFFFF_FFFFFFFF, but as (i64)0x00000000_FFFFFFFF. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152407 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-08Use uint16_t to store instruction implicit uses and defs. Reduces static data.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152301 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-08Re-commit r152202 hopefully fixing the MSVC linker error.Craig Topper
Original commit message: Use uint16_t to store InstrNameIndices in MCInstrInfo. Add asserts to protect all 16-bit string table offsets. Also make sure the string to offset table string is not larger than 65536 characters since larger string literals aren't portable. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152296 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-07Revert r152202 as it's causing internal buildbot failures.Chad Rosier
Original commit message: Use uint16_t to store InstrNameIndices in MCInstrInfo. Add asserts to protect all 16-bit string table offsets. Also make sure the string to offset table string is not larger than 65536 characters since larger string literals aren't portable. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152233 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-07Use uint16_t to store InstrNameIndices in MCInstrInfo. Add asserts to ↵Craig Topper
protect all 16-bit string table offsets. Also make sure the string to offset table string is not larger than 65536 characters since larger string literals aren't portable. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152202 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-06ARM more NEON VLD/VST composite physical register refactoring.Jim Grosbach
Register pair, all lanes subscripting. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152157 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-06ARM refactor more NEON VLD/VST instructions to use composite physregsJim Grosbach
Register pair VLD1/VLD2 all-lanes instructions. Kill off more of the pseudos as a result. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152150 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-06Fix support for encodings up to 64-bits in length. TableGen was silently ↵Owen Anderson
truncating them to 32-bits prior to this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152148 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-06Use uint16_t to store indices into string table since C++ only allows 64K ↵Craig Topper
string literals so the index into the big string can never be larger than that. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152105 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-06Add asserts to ensure that values will fit into the tables.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152104 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-05Nuke a bit of dead code.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152067 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-05ARM Refactor VLD/VST spaced pair instructions.Jim Grosbach
Use the new composite physical registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152063 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-05ARM refactor away a bunch of VLD/VST pseudo instructions.Jim Grosbach
With the new composite physical registers to represent arbitrary pairs of DPR registers, we don't need the pseudo-registers anymore. Get rid of a bunch of them that use DPR register pairs and just use the real instructions directly instead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152045 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-05Shrink and reorder fields in MCRegisterClass to reduce size of static data.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152019 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-05Convert more GenRegisterInfo tables from unsigned to uint16_t to reduce ↵Craig Topper
static data size. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152016 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-04Use uint16_t to store register overlaps to reduce static data.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152001 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-04Use uint16_t instead of unsigned to store registers in reg classes. Reduces ↵Craig Topper
static data size. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151998 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-04Use uint16_t to store registers in callee saved register tables to reduce ↵Craig Topper
size of static data. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151996 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-04Use uint8_t instead of enums to store values in X86 disassembler table. ↵Craig Topper
Shaves 150k off the size of X86DisassemblerDecoder.o git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151995 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-03Perform the string table optimization for OperandMatchEntries too.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151986 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-03Shrink the asm matcher tables.Benjamin Kramer
- Shrink the opcode field to 16 bits. - Shrink the AsmVariantID field to 8 bits. - Store the mnemonic string in a string table, store a 16 bit index. - Store a pascal-style length byte in the string instead of a null terminator, so we can avoid calling strlen on every entry we visit during mnemonic search. Shrinks X86AsmParser.o from 434k to 201k on x86_64 and eliminates relocs from the table. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151984 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-03StringToOffsetTable: Allow uniquing the first element, add an option to skip ↵Benjamin Kramer
appending a terminating null. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151983 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-01Move getSubRegIndex out of generated code into MCRegisterInfo, devirtualize it.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151821 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-01Move TargetRegisterInfo::getSubReg() to MCRegisterInfo.Jim Grosbach
Allows us to de-virtualize the function and provides access to it in the instruction printer, which is useful for handling composite physical registers (e.g., ARM register lists). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151815 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-01Revert "Emit the SubRegTable with the smallest possible integer type."Jim Grosbach
This reverts commit 151760. We want to move getSubReg() from TargetRegisterInfo into MCRegisterInfo, but to do that, the type of the lookup table needs to be the same for all targets. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151814 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-01Make TargetRegisterClasses non-virtual by making the only virtual function a ↵Benjamin Kramer
function pointer. This allows us to make TRC non-polymorphic and value-initializable, eliminating a huge static initializer and a ton of cruft from the generated code. Shrinks ARMBaseRegisterInfo.o by ~100k. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151806 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-01Emit the "is an intrinsic overloaded" table as a bitfield.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151792 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-01Emit the intrinsic modref info as a lookup table instead of a huge switch.Benjamin Kramer
Shrinks BasicAliasAnalysis.o from 106k to 56k on i386. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151781 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-29Implement getSubRegIndex as a linear search on the SubRegTable instead of ↵Benjamin Kramer
using a big switch. - The search bounds are constant, in the worst case (ARM target) it will scan over 30 uint16_ts. - This method isn't very hot, I had problems finding a testcase where it's called more than a dozen of times (no perf impact). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151773 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-29Tidy up. 80 columns.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151764 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-29Emit the SubRegTable with the smallest possible integer type.Benjamin Kramer
Doesn't help ARM with its massive register set, but halves the size on x86 and all other targets. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151760 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-29Tidy up. Spelling.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151758 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-29Move the subregister indicies enum into the REGINFO_ENUM section.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151756 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-29Switch TargetRegisterInfo::getSubReg() to use a lookup table.Jim Grosbach
Instead of nested switch statements, use a lookup table. On ARM, this replaces a 23k (x86_64 release build) function with a 16k table. Its not unlikely to be faster, as well. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151751 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-28Convert generated intrinsic attributes to use an array lookup as Chris ↵Craig Topper
suggested in PR11951. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151622 91177308-0d34-0410-b5e6-96231b3b80d8