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that vstudio build works
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unused parameters of CCStructAssign and add size and alignment requirement info.
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and alignment information on the parameter attribute.
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both work right according to the new flags.
This removes the TII::isReallySideEffectFree predicate, and adds
TII::isInvariantLoad.
It removes NeverHasSideEffects+MayHaveSideEffects and adds
UnmodeledSideEffects as machine instr flags. Now the clients
can decide everything they need.
I think isRematerializable can be implemented in terms of the
flags we have now, though I will let others tackle that.
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in the
x86 backend where instructions were not marked maystore/mayload, and perf issues where
instructions were not marked neverHasSideEffects. It would be really nice if we could
write patterns for copy instructions.
I have audited all the x86 instructions down to MOVDQAmr. The flags on others and on
other targets are probably not right in all cases, but no clients currently use this
info that are enabled by default.
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s-e is true).
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Also, instructions with any nodes that are SDNPMayLoad also read memory.
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This is currently not set by anything.
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Make MachineInstr::getDesc return a reference instead
of a pointer, since it can never be null.
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all clients over to using predicates instead of these flags directly.
These are now private values which are only to be used to statically
initialize the tables.
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Evan, please review the comments I added to getNumDefs to make sure
that they are accurate, thx.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45687 91177308-0d34-0410-b5e6-96231b3b80d8
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TargetInstrDescriptor class and shrink to 16-bits, saving a
word in TargetInstrDescriptor. Add some comments.
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just unconditionally use the def name of the instruction.
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over to using them, instead of diddling Flags directly. Change the
various flags from const variables to enums.
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instead of "ISD::STORE". This allows us to mark target-specific dag
nodes as storing (such as ppc byteswap stores). This allows us to remove
more explicit isStore flags from the .td files.
Finally, add a warning for when a .td file contains an explicit
isStore and tblgen is able to infer it.
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intrinsic that writes to memory.
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occured in a pattern, but failed miserably. The new code works for
any instruction that has a store in its pattern, including all the
x86 mem op mem instructions.
The only target-independent code that uses this is branch folding,
so this won't change anything in practice.
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instr, but don't do so yet.
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getName() accessor.
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out, DAGISelEmitter can compute it in its ctor, which simplifies some code.
Now we can use CodegenDAGPatterns in other parts of tblgen that want access
to dag pattern info, woo!
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The only difference in output is that we now print them in alphabetical
order instead of reverse alphabetical order.
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Split the pattern parsing code out from the dag isel emitter into it's own file.
No functionality change.
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the VC++ 'nesting depth' issue.
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if (!strcmp(Target, "x86")) {
// ...
}
else
IntrinsicID = Intrinsic::not_intrinsic;
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comparison for every builtin. This reduces the depth of
the if/elseif chain dramatically.
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of PointerType::get() has become PointerType::getUnqual(), which returns a pointer in the generic address space. The new prototype of PointerType::get() requires both a type and an address space.
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side effects for machine instructions.
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throw exceptions", just mark intrinsics with the nounwind
attribute. Likewise, mark intrinsics as readnone/readonly
and get rid of special aliasing logic (which didn't use
anything more than this anyway).
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section from TableGen project file as it is no longer needed. #Include <algorithm> directly from TGParser.cpp so it can see std::reverse.
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