Age | Commit message (Expand) | Author |
2012-03-01 | Revert "Emit the SubRegTable with the smallest possible integer type." | Jim Grosbach |
2012-02-29 | Emit the SubRegTable with the smallest possible integer type. | Benjamin Kramer |
2012-02-05 | Convert assert(0) to llvm_unreachable | Craig Topper |
2012-01-12 | Added MVT::v2f16 | Pete Cooper |
2012-01-09 | Split AsmParser into two components - AsmParser and AsmParserVariant | Devang Patel |
2011-12-20 | Add basic generic CodeGen support for half. | Dan Gohman |
2011-12-06 | First chunk of MachineInstr bundle support. | Evan Cheng |
2011-11-16 | Rename MVT::untyped to MVT::Untyped to match similar nomenclature. | Owen Anderson |
2011-10-01 | Move TableGen's parser and entry point into a library | Peter Collingbourne |
2011-09-29 | Switch to ArrayRef<CodeGenRegisterClass*>. | Jakob Stoklund Olesen |
2011-07-29 | Unconstify Inits | David Greene |
2011-07-29 | [AVX] Constify Inits | David Greene |
2011-07-11 | Revert r134921, 134917, 134908 and 134907. They're causing failures | Eric Christopher |
2011-07-11 | [AVX] Make Inits Foldable | David Greene |
2011-06-27 | Add support for alternative register names, useful for instructions whose ope... | Owen Anderson |
2011-06-18 | Store CodeGenRegisters as pointers so they won't be reallocated. | Jakob Stoklund Olesen |
2011-06-16 | Fix formatting. | Owen Anderson |
2011-06-15 | Add a new MVT::untyped. This will be used in future work for modelling ISA f... | Owen Anderson |
2011-06-15 | Give CodeGenRegisterClass a real sorted member set. | Jakob Stoklund Olesen |
2011-06-15 | Move the list of register classes into CodeGenRegBank as well. | Jakob Stoklund Olesen |
2011-06-11 | Move the list of registers into CodeGenRegBank. | Jakob Stoklund Olesen |
2011-06-10 | Move some sub-register index calculations to CodeGenRegisters.cpp | Jakob Stoklund Olesen |
2011-06-09 | Move TableGen's register bank classes to their own source file. | Jakob Stoklund Olesen |
2011-06-02 | Make it possible to have unallocatable register classes. | Jakob Stoklund Olesen |
2011-05-28 | Change how tblgen generates attributes for intrinsics to use a single | John McCall |
2011-05-07 | Teach TableGen to automatically generate missing SubRegIndex instances. | Jakob Stoklund Olesen |
2011-04-21 | Don't allow per-register spill size and alignment. | Jakob Stoklund Olesen |
2011-04-20 | Prefer cheap registers for busy live ranges. | Jakob Stoklund Olesen |
2011-03-11 | Make the register enum value part of the CodeGenRegister struct. | Jim Grosbach |
2011-03-11 | Trailing whitespace. | Jim Grosbach |
2010-12-23 | Flag -> Glue, the ongoing saga | Chris Lattner |
2010-12-21 | rename MVT::Flag to MVT::Glue. "Flag" is a terrible name for | Chris Lattner |
2010-12-15 | various cleanups to tblgen, patch by Garrison Venn! | Chris Lattner |
2010-12-13 | eliminate the Records global variable, patch by Garrison Venn! | Chris Lattner |
2010-11-02 | a bunch of random cleanup, move a helper to CGT where it belongs. | Chris Lattner |
2010-11-01 | eliminate the old InstFormatName which is always "AsmString", | Chris Lattner |
2010-09-21 | fix a long standing wart: all the ComplexPattern's were being | Chris Lattner |
2010-09-07 | Add an MVT::x86mmx type. It will take the place of all current MMX vector types. | Bill Wendling |
2010-09-07 | Fix whitespace, because I'm OCD. | Bill Wendling |
2010-08-05 | Remove IntrWriteMem, as it's the default. Rename IntrWriteArgMem | Dan Gohman |
2010-07-16 | Rename DBG_LABEL PROLOG_LABEL, because it's only used during prolog emission and | Bill Wendling |
2010-07-02 | Add a new target independent COPY instruction and code to lower it. | Jakob Stoklund Olesen |
2010-07-02 | Clean up TargetOpcodes.h a bit, and limit the number of places where the full | Jakob Stoklund Olesen |
2010-05-26 | Add StringRef::compare_numeric and use it to sort TableGen register records. | Jakob Stoklund Olesen |
2010-05-24 | Replace the tablegen RegisterClass field SubRegClassList with an alist-like data | Jakob Stoklund Olesen |
2010-05-13 | Adding a v8i64 512-bit vector type. This will be used to model ARM NEON intri... | Evan Cheng |
2010-05-01 | Add a pseudo instruction REG_SEQUENCE that takes a list of registers and | Evan Cheng |
2010-03-27 | fix CodeGenTarget::getRegisterVTs to not return the | Chris Lattner |
2010-03-23 | reject void in intrinsic type lists. | Chris Lattner |
2010-03-22 | Change intrinsic result type for void to store it as an empty list | Chris Lattner |