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2011-11-21Fix crasher in GVN due to my recent capture tracking changes.Nick Lewycky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145047 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-21Lowering for v32i8 to VPUNPCKLBW/VPUNPCKHBW when AVX2 is enabled.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145028 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-21Test case for r145026Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145027 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-21Make LowerSIGN_EXTEND_INREG split 256-bit vectors when AVX1 is enabled and ↵Craig Topper
use AVX2 shifts when AVX2 is enabled. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145022 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-20test/CodeGen/X86/block-placement.ll: Relax expressions for Win32.NAKAMURA Takumi
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145011 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-20The logic for breaking the CFG in the presence of hot successors didn'tChandler Carruth
properly account for the *global* probability of the edge being taken. This manifested as a very large number of unconditional branches to blocks being merged against the CFG even though they weren't particularly hot within the CFG. The fix is to check whether the edge being merged is both locally hot relative to other successors for the source block, and globally hot compared to other (unmerged) predecessors of the destination block. This introduces a new crasher on GCC single-source, but it's currently behind a flag, and Ben has offered to work on the reduction. =] git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145010 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-20XFAIL this test until I figure out what indvars is doing here (or find ↵Benjamin Kramer
someone who does) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145008 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-20Add some comments to the latest test case I added here to document whatChandler Carruth
is actually being tested. Also add some FileCheck goodness to much more carefully ensure that the result is the desired result. Before this test would only have failed through an assert failure if the underlying fix were reverted. Also, add some weight metadata and a comment explaining exactly what is going on to a trick section of the test case. Originally, we were getting very unlucky and trying to form a block chain that isn't actually profitable. I'm working on a fix to avoid forming these unprofitable chains, and that would also have masked any failure from this test case. The easy solution is to add some metadata that makes it *really* profitable to form the bad chain here. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145006 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-20Add code for lowering v32i8 shifts by a splat to AVX2 immediate shift ↵Craig Topper
instructions. Remove 256-bit splat handling from LowerShift as it was already handled by PerformShiftCombine. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145005 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-19Use 256-bit vcmpeqd for creating an all ones vector when AVX2 is enabled.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145004 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-19Move the handling of unanalyzable branches out of the loop-driven chainChandler Carruth
formation phase and into the initial walk of the basic blocks. We essentially pre-merge all blocks where unanalyzable fallthrough exists, as we won't be able to update the terminators effectively after any reorderings. This is quite a bit more principled as there may be CFGs where the second half of the unanalyzable pair has some analyzable predecessor that gets placed first. Then it may get placed next, implicitly breaking the unanalyzable branch even though we never even looked at the part that isn't analyzable. I've included a test case that triggers this (thanks Benjamin yet again!), and I'm hoping to synthesize some more general ones as I dig into related issues. Also, to make this new scheme work we have to be able to handle branches into the middle of a chain, so add this check. We always fallback on the incoming ordering. Finally, this starts to really underscore a known limitation of the current implementation -- we don't consider broken predecessors when merging successors. This can caused major missed opportunities, and is something I'm planning on looking at next (modulo more bug reports). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144994 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-19Test cases for SSSE3/AVX integer horizontal add/sub.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144990 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-19Extend VPBLENDVB and VPSIGN lowering to work for AVX2.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144987 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-18Fix a corner case in updating LoopInfo after fully unrolling an outer loop.Andrew Trick
The loop tree's inclusive block lists are painful and expensive to update. (I have no idea why they're inclusive). The design was supposed to handle this case but the implementation missed it and my unit tests weren't thorough enough. Fixes PR11335: loop unroll update. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144970 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-18Add AVX2 vpbroadcast supportNadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144967 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-18[asan] workaround for reg alloc bug 11395: don't instrument functions with ↵Kostya Serebryany
large chunks of inline assembler git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144962 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-17DISubrange supports unsigned lower/upper array bounds, so let's not fake it ↵Devang Patel
in the end while emitting DWARF. If a FE needs to encode signed lower/upper array bounds then we need to extend DISubrange or ad DISignedSubrange. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144937 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-17Fix an overly general check in SimplifyIndvar to handle useless phi cycles.Andrew Trick
The right way to check for a binary operation is cast<BinaryOperator>. The original check: cast<Instruction> && numOperands() == 2 would match phi "instructions", leading to an infinite loop in extreme corner case: a useless phi with operands [self, constant] that prior optimization passes failed to remove, being used in the loop by another useless phi, in turn being used by an lshr or udiv. Fixes PR11350: runaway iteration assertion. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144935 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-17fall back to explicit list of allowed linkages when instrumenting globals in ↵Kostya Serebryany
asan; add a test check that asan does not touch linkonce_odr git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144933 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-17When fast iseling a GEP, accumulate the offset rather than emitting a series ofChad Rosier
ADDs. MaxOffs is used as a threshold to limit the size of the offset. Tradeoffs being: (1) If we can't materialize the large constant then we'll cause fast-isel to bail. (2) Too large of an offset can't be directly encoded in the ADD resulting in a MOV+ADD. Generally not a bad thing because otherwise we would have had ADD+ADD, but on Thumb this turns into a MOVS+MOVT+ADD. Working on a fix for that. (3) Conversely, too low of a threshold we'll miss opportunities to coalesce ADDs. rdar://10412592 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144886 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-17Add support for custom names for library functions in TargetLibraryInfo. ↵Eli Friedman
Add a custom name for fwrite and fputs on x86-32 OSX. Make SimplifyLibCalls honor the custom names for fwrite and fputs. Fixes <rdar://problem/9815881>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144876 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-16build/make/test: Get rid of unused BUGPOINT_TOPTS variable.Daniel Dunbar
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144864 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-16Make sure to replace the chain properly when DAGCombining a ↵Eli Friedman
LOAD+EXTRACT_VECTOR_ELT into a single LOAD. Fixes PR10747/PR11393. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144863 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-16Remove obsolete test.Jim Grosbach
The PLD encoding is checked via the .s file now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144853 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-16Generalize the fixup info for ARM mode.Jim Grosbach
We don't (yet) have the granularity in the fixups to be specific about which bitranges are affected. That's a future cleanup, but we're not there yet. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144852 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-16Update test for r144842.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144851 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-16Another missing X86ISD::MOVLPD pattern. rdar://10450317Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144839 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-16Disable expensive two-address optimizations at -O0. rdar://10453055Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144806 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-16Fix typo in test.Nick Lewycky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144774 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-16Merge isObjectPointerWithTrustworthySize with getPointerSize. Use it whenNick Lewycky
looking at the size of the pointee. Fixes PR11390! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144773 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-16Fix testcase.Eli Friedman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144769 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-16CONCAT_VECTORS can have more than two operands. PR11389.Eli Friedman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144768 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-16AddressSanitizer, first commit (compiler module only)Kostya Serebryany
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144758 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-16Fix SCEV overly optimistic back edge taken count for multi-exit loops.Andrew Trick
Fixes PR11375: Different results for 'clang++ huh.cpp'... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144746 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15ARM assembly parsing for register range syntax for VLD/VST register lists.Jim Grosbach
For example, vld1.f64 {d2-d5}, [r2,:128]! Should be equivalent to: vld1.f64 {d2,d3,d4,d5}, [r2,:128]! It's not documented syntax in the ARM ARM, but it is consistent with what's accepted for VLDM/VSTM and is unambiguous in meaning, so it's a good thing to support. rdar://10451128 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144727 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15AVX: Add support for vbroadcast from BUILD_VECTOR and refactor some of the ↵Nadav Rotem
vbroadcast code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144720 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15test/CodeGen/X86/dec-eflags-lower.ll: Relax expression for win32 x64.NAKAMURA Takumi
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144714 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15ARM assembly parsing two operand forms for shift instructions.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144713 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15Added custom lowering for load->dec->store sequence in x86 when the EFLAGS ↵Pete Cooper
registers is used by later instructions. Only done for DEC64m right now. Fixes <rdar://problem/6172640> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144705 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15ARM alternate size suffices for VTRN instructions.Jim Grosbach
rdar://10435076 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144694 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15ARM assembly parsing for optional datatype suffix on VFP VMOV GPR<->VFP insns.Jim Grosbach
Yet more of rdar://10435076. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144691 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15ARM assembly parsing for two-operand form of 'mul' instruction.Jim Grosbach
rdar://10449856. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144689 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15ARM assembly parsing for two-operand form of 'mul' instruction.Jim Grosbach
Ongoing rdar://10435114. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144688 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15Testcase for r144684.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144685 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15Fix an ambiguous decoding where we failed to properly decode VMOVv2f32 and ↵Owen Anderson
VMOVv4f32. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144683 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15Thumb2 assembly parsing for mul.w in IT block fix.Jim Grosbach
When the 3rd operand is not a low-register, and the first two operands are the same low register, the parser was incorrectly trying to use the 16-bit instruction encoding. rdar://10449281 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144679 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15We currently use a callback to handle an IL pass deleting a BB that stillRafael Espindola
has a reference to it. Unfortunately, that doesn't work for codegen passes since we don't get notified of MBB's being deleted (the original BB stays). Use that fact to our advantage and after printing a function, check if any of the IL BBs corresponds to a symbol that was not printed. This fixes pr11202. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144674 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15Revert r144611 and r144613.Jakob Stoklund Olesen
These tests are actually correct, clang was miscompiling ExeDepsFix::processUses. Evan fixed the miscompilation in r144628. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144630 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15Rather than trying to use the loop block sequence *or* the functionChandler Carruth
block sequence when recovering from unanalyzable control flow constructs, *always* use the function sequence. I'm not sure why I ever went down the path of trying to use the loop sequence, it is fundamentally not the correct sequence to use. We're trying to preserve the incoming layout in the cases of unreasonable control flow, and that is only encoded at the function level. We already have a filter to select *exactly* the sub-set of blocks within the function that we're trying to form into a chain. The resulting code layout is also significantly better because of this. In several places we were ending up with completely unreasonable control flow constructs due to the ordering chosen by the loop structure for its internal storage. This change removes a completely wasteful vector of basic blocks, saving memory allocation in the common case even though it costs us CPU in the fairly rare case of unnatural loops. Finally, it fixes the latest crasher reduced out of GCC's single source. Thanks again to Benjamin Kramer for the reduction, my bugpoint skills failed at it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144627 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15Properly qualify AVX2 specific parts of execution dependency table. Also ↵Craig Topper
enable converting between 256-bit PS/PD operations when AVX1 is enabled. Fixes PR11370. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144622 91177308-0d34-0410-b5e6-96231b3b80d8
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