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2012-09-25Change the way the lint sanity checking pass detects misaligned memory accesses.Duncan Sands
Previously it was only be able to detect problems if the pointer was a numerical value (eg inttoptr i32 1 to i32*), but not if it was an alloca or globa. The reason was the use of ComputeMaskedBits: imagine you have "alloca i8, align 2", and ask ComputeMaskedBits what it knows about the bits of the alloca pointer. It can tell you that the bottom bit is known zero (due to align 2) but it can't tell you that bit 1 is known one. That's because the address could be an even multiple of 2 rather than an odd multiple, eg it might be a multiple of 4. Thus trying to use KnownOne is ineffective in the case of an alloca as it will never have any bits set. Instead look explicitly for constant offsets from allocas and globals. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164595 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-25Fix an illegal tailcall opt where the callee returns a double via xmm while ↵Evan Cheng
caller returns x86_fp80 via st0. rdar://12229511 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164588 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-25Don't forget that strcpy and friends return a pointer to the destination, soNick Lewycky
it's not a dead store if that pointer is used. Whoops! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164583 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-25ARM: 'add Rd, pc, #imm' is an alias for 'adr Rd, #imm'.Jim Grosbach
rdar://9795790 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164577 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-24Mark jump tables in code sections with DataRegion directives.Jim Grosbach
Even out-of-line jump tables can be in the code section, so mark them as data-regions for those targets which support the directives. rdar://12362871&12362974 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164571 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-24Teach DSE that strcpy, strncpy, strcat and strncat are all stores which may beNick Lewycky
dead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164561 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-24Specify MachinePointerInfo as refering to the argument value and offset of theRoman Divacky
store when handling byval arguments. Thus preventing reordering of the store with load with post-RA scheduler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164553 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-24Add missing : in CHECK line.Richard Osborne
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164540 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-24Add missing check for presence of target data.Richard Osborne
This avoids a crash in visitAllocaInst when target data isn't available. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164539 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-24Address one of the original FIXMEs for the new SROA pass by implementingChandler Carruth
integer promotion analogous to vector promotion. When there is an integer alloca being accessed both as its integer type and as a narrower integer type, promote the narrower access to "insert" and "extract" the smaller integer from the larger one, and make the integer alloca a candidate for promotion. In the new formulation, we don't care about target legal integer or use thresholds to control things. Instead, we only perform this promotion to an integer type which the frontend has already emitted a load or store for. This bounds the scope and prevents optimization passes from coalescing larger and larger entities into a single integer. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164479 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-23Emit dtors into proper section while compiling in vcpp-compatible mode.Anton Korobeynikov
Patch by Kai! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164476 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-23Switch to a signed representation for the dynamic offsets while walkingChandler Carruth
across the uses of the alloca. It's entirely possible for negative numbers to come up here, and in some rare cases simply doing the 2's complement arithmetic isn't the correct decision. Notably, we can't zext the index of the GEP. The definition of GEP is that these offsets are sign extended or truncated to the size of the pointer, and then wrapping 2's complement arithmetic used. This patch fixes an issue that comes up with *no* input from the buildbots or bootstrap afaict. The only place where it manifested, disturbingly, is Clang's own regression test suite. A reduced and targeted collection of tests are added to cope with this. Note that I've tried to pin down the potential cases of overflow, but may have missed some cases. I've tried to add a few cases to test this, but its hard because LLVM has quite limited support for >64bit constructs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164475 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-23Don't do actual work inside an assert statement. Fixes PR11760!Nick Lewycky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164474 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-23Revise test to avoid using of 'grep'Michael Liao
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164472 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-22Enhance test case of atomic16 to verify inst encoding fixed in r164453.Michael Liao
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164465 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-22Fix edge cases of ARM shift operands in arith instructions.Tim Northover
As before with load instructions, oddities like "asr #32", "rrx" could be printed incorrectly. Patch by Chris Lidbury. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164456 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-22Fix the handling of edge cases in ARM shifted operands.Tim Northover
This patch fixes load/store instructions to handle less common cases like "asr #32", "rrx" properly throughout the MC layer. Patch by Chris Lidbury. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164455 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-21Fix a case where the new SROA pass failed to zap dead operands toChandler Carruth
selects with a constant condition. This resulted in the operands remaining live through the SROA rewriter. Most of the time, this just caused some dead allocas to persist and get zapped by later passes, but in one case found by Joerg, it caused a crash when we tried to *promote* the alloca despite it having this dead use. We already have the mechanisms in place to handle this, just wire select up to them. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164427 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-21LoopIdiom: Give up when the loop is not in canonical form.Benjamin Kramer
We rely on it when doing the transforms. This can happen when there is an indirectbr in the loop. Fixes PR13892. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164383 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-21[fast-isel] Fallback to SelectionDAG isel if we require strict alignment forChad Rosier
non-aligned i32 loads/stores. rdar://12304911 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164381 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-21InstCombine: Make sure we use the pre-zext type when creating a constant of ↵Benjamin Kramer
a value that is zext'd. Fixes PR13250. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164377 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-21BitcodeReader: Correctly insert blockaddress constant referring to a already ↵Benjamin Kramer
parsed function. We inserted a placeholder that was never replaced because the function was already visited. Assert that all placeholders have been resolved when tearing down the bitcode reader. Fixes PR13895. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164369 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-21Fix SymbolRef::getAddress implementation for ELF. The 'value' field in ↵Alexey Samsonov
symbol table entry should be treated differently for relocatable and relocated files. This patch fixes symbol addresses printed by llvm-nm for executables and shared objects. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164365 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-21llvm/test/CodeGen/X86/pr5145.ll: Tweak expressions to match for darwin target.NAKAMURA Takumi
.LBB0_1: # Linux LBB0_1: # Darwin git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164362 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-21Add missing i8 max/min/umax/umin supportMichael Liao
- Fix PR5145 and turn on test 8-bit atomic ops git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164358 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-21llvm/test/CodeGen/ARM/fast-isel.ll: Fix possible typos, ↵NAKAMURA Takumi
s/@unaligned_i16_store/@unaligned_i16_load/g. I guess this had apparently passed in +Asserts possibly due to verborsity. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164350 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-21Testcase does not need to be this strict.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164347 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-21Add newline.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164346 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-21[fast-isel] Fallback to SelectionDAG isel if we require strict alignment forChad Rosier
non-halfword-aligned i16 loads/stores. rdar://12304911 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164345 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-21ARM: Use a dedicated intrinsic for vector bitwise select.Jim Grosbach
The expression based expansion too often results in IR level optimizations splitting the intermediate values into separate basic blocks, preventing the formation of the VBSL instruction as the code author intended. In particular, LICM would often hoist part of the computation out of a loop. rdar://11011471 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164340 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-20Ignore PHI-defs for -new-coalescer interference checks.Jakob Stoklund Olesen
A PHI can't create interference on its own. If two live ranges interfere at a PHI, they must also interfere when leaving one of the PHI predecessors. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164330 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-20Only emit DW_AT_object_pointer if this is a definition.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164326 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-20SimplifyCFG: sink common codes from IF, ELSE blocks down to END block.Manman Ren
We already have HoistThenElseCodeToIf, this patch implements SinkThenElseCodeToEnd. When END block has only two predecessors and each predecessor terminates with unconditional branches, we compare instructions in IF and ELSE blocks backwards and check whether we can sink the common instructions down. rdar://12191395 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164325 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-20Try to make these tests more portable.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164320 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-20Fix broken check lines.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164317 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-20Specify cpu to get the correct instruction ordering. Remove XFAIL.Roman Divacky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164306 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-20Specify CPu to prevent failure on ATOM due to different code schedulingMichael Liao
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164283 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-20Re-work X86 code generation of atomic ops with spin-loopMichael Liao
- Rewrite/merge pseudo-atomic instruction emitters to address the following issue: * Reduce one unnecessary load in spin-loop previously the spin-loop looks like thisMBB: newMBB: ld t1 = [bitinstr.addr] op t2 = t1, [bitinstr.val] not t3 = t2 (if Invert) mov EAX = t1 lcs dest = [bitinstr.addr], t3 [EAX is implicit] bz newMBB fallthrough -->nextMBB the 'ld' at the beginning of newMBB should be lift out of the loop as lcs (or CMPXCHG on x86) will load the current memory value into EAX. This loop is refined as: thisMBB: EAX = LOAD [MI.addr] mainMBB: t1 = OP [MI.val], EAX LCMPXCHG [MI.addr], t1, [EAX is implicitly used & defined] JNE mainMBB sinkMBB: * Remove immopc as, so far, all pseudo-atomic instructions has all-register form only, there is no immedidate operand. * Remove unnecessary attributes/modifiers in pseudo-atomic instruction td * Fix issues in PR13458 - Add comprehensive tests on atomic ops on various data types. NOTE: Some of them are turned off due to missing functionality. - Revise tests due to the new spin-loop generated. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164281 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-19Resolve conflicts involving dead vector lanes for -new-coalescer.Jakob Stoklund Olesen
A common coalescing conflict in vector code is lane insertion: %dst = FOO %src = BAR %dst:ssub0 = COPY %src The live range of %src interferes with the ssub0 lane of %dst, but that lane is never read after %src would have clobbered it. That makes it safe to merge the live ranges and eliminate the COPY: %dst = FOO %dst:ssub0 = BAR This patch teaches the new coalescer to resolve conflicts where dead vector lanes would be clobbered, at least as long as the clobbered vector lanes don't escape the basic block. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164250 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-19Add support for macro parameters/arguments delimited by spaces,Preston Gurd
to improve compatibility with GNU as. Based on a patch by PaX Team. Fixed assertion failures on non-Darwin and added additional test cases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164248 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-19Support default parameters/arguments for assembler macros.Preston Gurd
This patch is based on the one by PaX Team. Patch by Andy Zhang! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164246 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-19Enhance unmatched '.endr' directive error message in assembler.Preston Gurd
The directive can be matched with directives other than '.rept' Patch by Andy Zhang! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164245 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-19Unify the logic in SelectAtomicLoadAdd and SelectAtomicLoadArithMichael Liao
- Merge the processing of LOAD_ADD with other atomic load-arith operations - Separate the logic getting target constant for atomic-load-op and add an optimization for atomic-load-add on i16 with negative value - Optimize a minor case for atomic-fetch-add i16 with negative operand. Test case is revised. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164243 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-19Really XFAIL test/CodeGen/PowerPC/structsinregs.ll.Jordan Rose
XFAIL needs a trailing colon. Hopefully this will get the buildbots happy again while Bill works on getting it passing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164237 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-19XFAIL test/CodeGen/PowerPC/structsinregs.llBill Schmidt
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164233 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-19Small structs for PPC64 SVR4 must be passed right-justified in registers.Bill Schmidt
lib/Target/PowerPC/PPCISelLowering.{h,cpp} Rename LowerFormalArguments_Darwin to LowerFormalArguments_Darwin_Or_64SVR4. Rename LowerFormalArguments_SVR4 to LowerFormalArguments_32SVR4. Receive small structs right-justified in LowerFormalArguments_Darwin_Or_64SVR4. Rename LowerCall_Darwin to LowerCall_Darwin_Or_64SVR4. Rename LowerCall_SVR4 to LowerCall_32SVR4. Pass small structs right-justified in LowerCall_Darwin_Or_64SVR4. test/CodeGen/PowerPC/structsinregs.ll New test. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164228 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-19SimplifyCFG: Don't generate invalid code for switch used to initializeHans Wennborg
two variables where the first variable is returned and the second ignored. I don't think this occurs in practice (other passes should have cleaned up the unused phi node), but it should still be handled correctly. Also make the logic for determining if we should return early less sketchy. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164225 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-19Move load_to_switch.ll to test/CodeGen/SPARC/Hans Wennborg
Because the test invokes llc -march=sparc, it needs to be in a directory which is only run when the sparc target is built. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164211 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-19rename testNadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164210 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-19Prevent inlining of callees which allocate lots of memory into a recursive ↵Nadav Rotem
caller. Example: void foo() { ... foo(); // I'm recursive! bar(); } bar() { int a[1000]; // large stack size } rdar://10853263 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164207 91177308-0d34-0410-b5e6-96231b3b80d8
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