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2012-10-12Legalizer optimize a pair of div / mod to a call to divrem libcall if they areEvan Cheng
not legal. However, it should use a div instruction + mul + sub if divide is legal. The rem legalization code was missing a check and incorrectly uses a divrem libcall even when div is legal. rdar://12481395 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165778 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-11Change encoding of instruction operands in bitcode binaries to be relativeJan Wen Voung
to the instruction position. The old encoding would give an absolute ID which counts up within a function, and only resets at the next function. I.e., Instead of having: ... = icmp eq i32 n-1, n-2 br i1 ..., label %bb1, label %bb2 it will now be roughly: ... = icmp eq i32 1, 2 br i1 1, label %bb1, label %bb2 This makes it so that ids remain relatively small and can be encoded in fewer bits. With this encoding, forward reference operands will be given negative-valued IDs. Use signed VBRs for the most common case of forward references, which is phi instructions. To retain backward compatibility we bump the bitcode version from 0 to 1 to distinguish between the different encodings. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165739 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-11Pass an explicit operand number to addLiveIns.Jakob Stoklund Olesen
Not all instructions define a virtual register in their first operand. Specifically, INLINEASM has a different format. <rdar://problem/12472811> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165721 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-11This patch addresses PR13947.Bill Schmidt
For function calls on the 64-bit PowerPC SVR4 target, each parameter is mapped to as many doublewords in the parameter save area as necessary to hold the parameter. The first 13 non-varargs floating-point values are passed in registers; any additional floating-point parameters are passed in the parameter save area. A single-precision floating-point parameter (32 bits) must be mapped to the second (rightmost, low-order) word of its assigned doubleword slot. Currently LLVM violates this ABI requirement by mapping such a parameter to the first (leftmost, high-order) word of its assigned doubleword slot. This is internally self-consistent but will not interoperate correctly with libraries compiled with an ABI-compliant compiler. This patch corrects the problem by adjusting the parameter addressing on both sides of the calling convention. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165714 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-11Add test cases for correct parsing of register names in 32- and 64-bit modes.David Chisnall
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165713 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-11Expose move to/from coprocessor instructions in MIPS64 mode.David Chisnall
Note: [D]M{T,F}CP2 is just a recommended encoding. Vendors often provide a custom CP2 that interprets instructions differently and may wish to add their own instructions that use this opcode. We should ensure that this is easy to do. I will probably add a 'has custom CP{0-3}' subtarget flag to make this easy: We want to avoid the GCC situation where every MIPS vendor makes a custom fork that breaks every other MIPS CPU and so can't be merged upstream. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165711 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-11dependence analysisSebastian Pop
Patch from Preston Briggs <preston.briggs@gmail.com>. This is an updated version of the dependence-analysis patch, including an MIV test based on Banerjee's inequalities. It's a fairly complete implementation of the paper Practical Dependence Testing Gina Goff, Ken Kennedy, and Chau-Wen Tseng PLDI 1991 It cannot yet propagate constraints between coupled RDIV subscripts (discussed in Section 5.3.2 of the paper). It's organized as a FunctionPass with a single entry point that supports testing for dependence between two instructions in a function. If there's no dependence, it returns null. If there's a dependence, it returns a pointer to a Dependence which can be queried about details (what kind of dependence, is it loop independent, direction and distance vector entries, etc). I haven't included every imaginable feature, but there's a good selection that should be adequate for supporting many loop transformations. Of course, it can be extended as necessary. Included in the patch file are many test cases, commented with C code showing the loops and array references. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165708 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-11Don't crash when !tbaa.struct contents is invalid.Nick Lewycky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165693 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-11Revert r165661, "Patch by Shuxin Yang <shuxin.llvm@gmail.com>."NAKAMURA Takumi
It broke stage2 clang and test-suite/MultiSource/Benchmarks/mediabench/g721/g721encode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165692 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-11Don't crash if a .ll file contains a forward-reference that looks like a globalNick Lewycky
value but later turns out to be a function. Unfortunately, we can't fold tests into a single file because we only get one error out of llvm-as. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165680 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-10Add isel patterns for v2f32 / v4f32 neon.vbsl intrinsics. rdar://12471808Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165673 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-10Add -mattr=+altivec and remove XFAIL.Bill Schmidt
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165666 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-10XFAIL for all targets pending investigationBill Schmidt
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165664 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-10Patch by Shuxin Yang <shuxin.llvm@gmail.com>.Nadav Rotem
Original message: The attached is the fix to radar://11663049. The optimization can be outlined by following rules: (select (x != c), e, c) -> select (x != c), e, x), (select (x == c), c, e) -> select (x == c), x, e) where the <c> is an integer constant. The reason for this change is that : on x86, conditional-move-from-constant needs two instructions; however, conditional-move-from-register need only one instruction. While the LowerSELECT() sounds to be the most convenient place for this optimization, it turns out to be a bad place. The reason is that by replacing the constant <c> with a symbolic value, it obscure some instruction-combining opportunities which would otherwise be very easy to spot. For that reason, I have to postpone the change to last instruction-combining phase. The change passes the test of "make check-all -C <build-root/test" and "make -C project/test-suite/SingleSource". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165661 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-10When generating spill and reload code for vector registers on PowerPC,Bill Schmidt
the compiler makes use of GPR0. However, there are two flavors of GPR0 defined by the target: the 32-bit GPR0 (R0) and the 64-bit GPR0 (X0). The spill/reload code makes use of R0 regardless of whether we are generating 32- or 64-bit code. This patch corrects the problem in the obvious manner, using X0 and ADDI8 for 64-bit and R0 and ADDI for 32-bit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165658 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-10The PowerPC VRSAVE register has been somewhat of an odd beast sinceBill Schmidt
the Altivec extensions were introduced. Its use is optional, and allows the compiler to communicate to the operating system which vector registers should be saved and restored during a context switch. In practice, this information is ignored by the various operating systems using the SVR4 ABI; the kernel saves and restores the entire register state. Setting the VRSAVE register is no longer performed by the AIX XL compilers, the IBM i compilers, or by GCC on Power Linux systems. It seems best to avoid this logic within LLVM as well. This patch avoids generating code to update and restore VRSAVE for the PowerPC SVR4 ABIs (32- and 64-bit). The code remains in place for the Darwin ABI. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165656 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-10Add the testcase from pr13254 (the old scalarreply pass handles this wrong;Duncan Sands
the new sroa pass handles it right). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165644 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-10Specify CPU model to avoid breaking ATOM buildsMichael Liao
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165638 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-10Add support for FP_ROUND from v2f64 to v2f32Michael Liao
- Due to the current matching vector elements constraints in ISD::FP_ROUND, rounding from v2f64 to v4f32 (after legalization from v2f32) is scalarized. Add a customized v2f32 widening to convert it into a target-specific X86ISD::VFPROUND to work around this constraints. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165631 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-10[CMake] check-all: Don't include check-llvm into check-all without ↵NAKAMURA Takumi
LLVM_BUILD_TOOLS. FIXME: Would you like to run llvm/unittests w/o LLVM_BUILD_TESTS regardless of LLVM_BUILD_TOOLS? git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165619 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-10Fix for LDRB instruction:Stepan Dyatkovskiy
SDNode for LDRB_POST_IMM is invalid: number of registers added to SDNode fewer that described in .td. 7 ops is needed, but SDNode with only 6 is created. In more details: In ARMInstrInfo.td, in multiclass AI2_ldridx, in definition _POST_IMM, offset operand is defined as am2offset_imm. am2offset_imm is complex parameter type, and actually it consists from dummy register and imm itself. As I understood trick with dummy reg was made for AsmParser. In ARMISelLowering.cpp, this dummy register was not added to SDNode, and it cause crash in Peephole Optimizer pass. The problem fixed by setting up additional dummy reg when emitting LDRB_POST_IMM instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165617 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-10Issue description:Stepan Dyatkovskiy
SchedulerDAGInstrs::buildSchedGraph ignores dependencies between FixedStack objects and byval parameters. So loading byval parameters from stack may be inserted *before* it will be stored, since these operations are treated as independent. Fix: Currently ARMTargetLowering::LowerFormalArguments saves byval registers with FixedStack MachinePointerInfo. To fix the problem we need to store byval registers with MachinePointerInfo referenced to first the "byval" parameter. Also commit adds two new fields to the InputArg structure: Function's argument index and InputArg's part offset in bytes relative to the start position of Function's argument. E.g.: If function's argument is 128 bit width and it was splitted onto 32 bit regs, then we got 4 InputArg structs with same arg index, but different offset values. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165616 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-10Test case for r165480.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165594 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-10Implement MipsTargetLowering::CanLowerReturn.Akira Hatanaka
Patch by Sasa Stankovic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165585 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-09When expanding atomic load arith instructions, do not lose target flags. ↵Evan Cheng
rdar://12453106 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165568 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-09Initial assembler implementation of Mips load address macroJack Carter
This patch provides initial implementation of load address macro instruction for Mips. We have implemented two kinds of expansions with their variations depending on the size of immediate operand: 1) load address with immediate value directly: * la d,j => addiu d,$zero,j (for -32768 <= j <= 65535) * la d,j => lui d,hi16(j) ori d,d,lo16(j) (for any other 32 bit value of j) 2) load load address with register offset value * la d,j(s) => addiu d,s,j (for -32768 <= j <= 65535) * la d,j(s) => lui d,hi16(j) (for any other 32 bit value of j) ori d,d,lo16(j) addu d,d,s This patch does not cover the case when the address is loaded from the value of the label or function. Contributer: Vladimir Medic git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165561 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-09Inline the checks for mutually exclusive attributes since they're used in ↵Bill Wendling
only one module. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165539 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-09Enable response files in all tools. Patch by Liu, Yaxun (Sam). I have simplifiedRafael Espindola
the test. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165535 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-09New EarlyCSE tests for CSE-ing across commutativity.Michael Ilseman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165510 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-09Fix PR14016.Alexey Samsonov
DeadArgumentElimination pass can replace one LLVM function with another, invalidating a pointer stored in debug info metadata entry for this function. To fix this, we collect debug info descriptors for functions before running a DeadArgumentElimination pass and "patch" pointers in metadata nodes if we replace a function. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165490 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-09Revert r117093, "test/Makefile: Force lit -j1 on Cygwin."NAKAMURA Takumi
lit -jN works on cygwin in most cases, but still sometimes I can see stalls with iterative run on the buildbot. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165482 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-09Fix PR14034, an infloop / heap corruption / crash bug in the new SROA.Chandler Carruth
Thanks to Benjamin for the raw test case. This one took about 50 times longer to reduce than to fix. =/ git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165476 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-08Don't crash on extra evil irreducible control flow.Jakob Stoklund Olesen
When the CFG contains a loop with multiple entry blocks, the traces computed by MachineTraceMetrics don't always have the same nice properties. Loop back-edges are normally excluded from traces, but MachineLoopInfo doesn't recognize loops with multiple entry blocks, so those back-edges may be included. Avoid asserting when that happens by adding an isEarlierInSameTrace() function that accurately determines if a dominating block is part of the same trace AND is above the currrent block in the trace. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165434 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-08PR12716: PPC crashes on vector compareAdhemerval Zanella
Vector compare using altivec 'vcmpxxx' instructions have as third argument a vector register instead of CR one, different from integer and float-point compares. This leads to a failure in code generation, where 'SelectSETCC' expects a DAG with a CR register and gets vector register instead. This patch changes the behavior by just returning a DAG with the vector compare instruction based on the type. The patch also adds a testcase for all vector types llvm defines. It also included a fix on signed 5-bits predicates printing, where signed values were not handled correctly as signed (char are unsigned by default for PowerPC). This generates 'vspltisw' (vector splat) instruction with SIM out of range. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165419 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-08Add floating-point to and from integer conversionAdhemerval Zanella
This patch add altivec support for v4i32 to v4f32 and for v4f32 to v4i32 vector rounding conversion. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165409 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-08Move TargetData to DataLayout.Micah Villmow
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165403 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-08Some regression tests which are testing the old jit and are exercising ↵James Molloy
functionality which is both known to be broken and not expected to be fixed in the old jit. To remove these from the regression test output, I've marked them XFAIL (for lit tests) and ifdef'd them out (unit tests). These modifications remove the last long-standing regression test failures from the buildbots (though updating the triple to reflect new ubuntu configuration has temporarily caused some new failures). Tested on x86-64 and ARM Linux. Patch by David Tweed! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165390 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-07X86: fcmov doesn't handle all possible EFLAGS, fall back to a branch for the ↵Benjamin Kramer
others. Otherwise it will try to use SSE patterns and fail horribly if sse is disabled. Fixes PR14035. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165377 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-06Adding support for instructions mfc0, mfc2, mtc0, mtc2Jack Carter
move from and to coprocessors 0 and 2. Contributer: Vladimir Medic git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165351 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-05Patch for integer multiply, signed/unsigned, long/long long.Reed Kotler
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165322 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-05Enable llvm/test/ExecutionEngine/MCJIT also for cygwin.NAKAMURA Takumi
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165313 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-05Convert to unix line endings.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165308 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-05Make sure to generate the right kind of MDNode for enum forward declarations.Eli Friedman
PR14029, LLVM part. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165288 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-05Follow up to r165072. Try a different approach: only move the load when it's ↵Evan Cheng
going to be folded into the call. rdar://12437604 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165287 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-05Teach the new SROA a new trick. Now we zap any memcpy or memmoves whichChandler Carruth
are in fact identity operations. We detect these and kill their partitions so that even splitting is unaffected by them. This is particularly important because Clang relies on emitting identity memcpy operations for struct copies, and these fold away to constants very often after inlining. Fixes the last big performance FIXME I have on my plate. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165285 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-04When merging connsecutive stores, use vectors to store the constant zero.Nadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165267 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-04ARM: locate user-defined text sections next to default text.Jim Grosbach
Make sure functions located in user specified text sections (via the section attribute) are located together with the default text sections. Otherwise, for large object files, the relocations for call instructions are more likely to be out of range. This becomes even more likely in the presence of LTO. rdar://12402636 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165254 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-04Update this a bit more to represent how the prologue should work:Eric Christopher
a) frame setup instructions define the prologue b) we shouldn't change our location mid-stream Add a test to make sure that the stack adjustment stays within the prologue. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165250 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-04SimplifyCFG: Enhance the "remove CFG edge that leads to null pointer ↵Benjamin Kramer
dereference" optimization to also handle instructions with multiple uses. We conservatively only check the first use to avoid walking long use chains. This catches the common case of having both a load and a store to a pointer supplied by a PHI node. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165232 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-04In my recent change to avoid use of underaligned memory I didn't notice thatDuncan Sands
cpyDest can be mutated in some cases, which would then cause a crash later if indeed the memory was underaligned. This brought down several buildbots, so I guess the underaligned case is much more common than I thought! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165228 91177308-0d34-0410-b5e6-96231b3b80d8
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