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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78703 91177308-0d34-0410-b5e6-96231b3b80d8
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evaluation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78692 91177308-0d34-0410-b5e6-96231b3b80d8
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into one bigger test (which runs faster)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78672 91177308-0d34-0410-b5e6-96231b3b80d8
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alignment. Only the minimum alignment guaranteed by the ABI may be assumed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78668 91177308-0d34-0410-b5e6-96231b3b80d8
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instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78659 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78652 91177308-0d34-0410-b5e6-96231b3b80d8
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The register scavenger maintains a DistanceMap that maps MI pointers to their
distance from the top of the current MBB. The DistanceMap is built
incrementally in forward() and in bulk in findFirstUse(). It is used by
scavengeRegister() to determine which candidate register has the longest
unused interval.
Unfortunately the DistanceMap contents can become outdated. The first time
scavengeRegister() is called, the DistanceMap is filled to cover the MBB. If
then instructions are inserted in the MBB (as they always are following
scavengeRegister()), the recorded distances are too short. This causes bad
behaviour in the included test case where a register use /after/ the current
position is ignored because findFirstUse() thinks is is /before/ the current
position. A "using an undefined register" assertion follows promptly.
The fix is to build a fresh DistanceMap at the top of scavengeRegister(), and
discard it after use. This means that DistanceMap is no longer needed as a
RegScavenger member variable, and forward() doesn't need to update it.
The fix then discloses issue number two in the same test case: The candidate
search in scavengeRegister() finds a CSR that has been saved in the prologue,
but is currently unused. It would be both inefficient and wrong to spill such
a register in the emergency spill slot. In the present case, the emergency
slot restore is placed immediately before the normal epilogue restore, leading
to a "Redefining a live register" assertion.
Fix number two: When scavengerRegister() stumbles upon an unused register that
is overwritten later in the MBB, return that register early. It is important
to verify that the register is defined later in the MBB, otherwise it might be
an unspilled CSR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78650 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78648 91177308-0d34-0410-b5e6-96231b3b80d8
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the overloaded vector types allowed floating-point or integer vector elements.
Most of these operations actually depend on the element type, so bitcasting
was not an option.
If you include the vpadd intrinsics that I updated earlier, this gets rid
of 20 intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78646 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78642 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78641 91177308-0d34-0410-b5e6-96231b3b80d8
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yet (I'm not even sure what they do).
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(and outputting a diagnostic pointing at the wrong place), all of which lead to
much confusion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78637 91177308-0d34-0410-b5e6-96231b3b80d8
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- This drops us to 123 ambiguous instructions (previously ~500) on X86.
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of thumb2 tests to FileCheck.
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MERGE_VALUES nodes. Replacing the result values with the
operands in one MERGE_VALUES node may cause another
MERGE_VALUES node be CSE'd with the first one, and bring
its uses along, so that the first one isn't dead, as this
code expects. Fix this by iterating until the node is
really dead. This fixes PR4699.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78606 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78598 91177308-0d34-0410-b5e6-96231b3b80d8
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instruction operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78565 91177308-0d34-0410-b5e6-96231b3b80d8
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instead of syntactically as a string. This means that it keeps track of the
segment, section, flags, etc directly and asmprints them in the right format.
This also includes parsing and validation support for llvm-mc and
"attribute(section)", so we should now start getting errors about invalid
section attributes from the compiler instead of the assembler on darwin.
Still todo:
1) Uniquing of darwin mcsections
2) Move all the Darwin stuff out to MCSectionMachO.[cpp|h]
3) there are a few FIXMEs, for example what is the syntax to get the
S_GB_ZEROFILL segment type?
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78531 91177308-0d34-0410-b5e6-96231b3b80d8
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- We can now discriminate SUB32ri8 from SUB32ri, for example.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78528 91177308-0d34-0410-b5e6-96231b3b80d8
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classes.
This totally optimizes PIC16 sections by not having an 'isdirective' bit anymore!! ;-)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78512 91177308-0d34-0410-b5e6-96231b3b80d8
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bytes for F2 0F 38 and propagate. Add a FIXME for a set
of possibilities which correspond to intrinsics already used.
New test.
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Blackfin supports and/or/xor on i32 but not on i16. Teach
DAGCombiner::SimplifyBinOpWithSameOpcodeHands to not produce illegal nodes
after legalize ops.
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Verify that early clobber registers and their aliases are not used.
All changes to RegsAvailable are now done as a transaction so the order of
operands makes no difference.
The included test case is from PR4686. It has behaviour that was dependent on the order of operands.
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- This doesn't actually improve the algorithm (its still linear), but the
generated (match) code is now fairly compact and table driven. Still need a
generic string matcher.
- The table still needs to be compressed, this is quite simple to do and should
shrink it to under 16k.
- This also simplifies and restructures the code to make the match classes more
explicit, in anticipation of resolving ambiguities.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78446 91177308-0d34-0410-b5e6-96231b3b80d8
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is more tolerant of whitespace differences.
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I can clean this up a bit more and do way with the TheCondState and just use
the top element on the TheCondStack if not empty. Also may tweak the code
around ParseConditionalAssemblyDirectives() to simplify the AsmParser code.
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motivated to fix it.
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