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2010-08-27X86: Fix an encoding issue with LOCK_ADD64mr, which could lead to very hard ↵Daniel Dunbar
to find miscompiles with the integrated assembler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112250 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-26Add a hackaround for PR7993 which is causing failures on x86 builders that ↵Chris Lattner
lack sse2. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112175 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-26I think enough general codegen bugs are fixed to allow this to workChris Lattner
on random hosts, lets see! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112172 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-26implement SplitVecOp_CONCAT_VECTORS, fixing the included testcase with SSE1.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112171 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-26Make sure this forces the x86 targetsChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112169 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-26fix sse1 only codegen in x86-64 mode, which is something weChris Lattner
apparently try to support. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112168 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-26Enable pre-RA virtual frame base register allocation. rdar://8277890Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112127 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-26Revert svn 107892 (with changes to work with trunk). It caused a crash ifBob Wilson
a VLD result was not used (Radar 8355607). It should also fix pr7988, but I haven't verified that yet. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112118 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-25temporarily disable this, which started failing on the llvm-i686-linuxChris Lattner
builder. I will investigate tonight. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112113 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-25Change handling of illegal vector types to widen when possible instead of Chris Lattner
expanding: e.g. <2 x float> -> <4 x float> instead of -> 2 floats. This affects two places in the code: handling cross block values and handling function return and arguments. Since vectors are already widened by legalizetypes, this gives us much better code and unblocks x86-64 abi and SPU abi work. For example, this (which is a silly example of a cross-block value): define <4 x float> @test2(<4 x float> %A) nounwind { %B = shufflevector <4 x float> %A, <4 x float> undef, <2 x i32> <i32 0, i32 1> %C = fadd <2 x float> %B, %B br label %BB BB: %D = fadd <2 x float> %C, %C %E = shufflevector <2 x float> %D, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef> ret <4 x float> %E } Now compiles into: _test2: ## @test2 ## BB#0: addps %xmm0, %xmm0 addps %xmm0, %xmm0 ret previously it compiled into: _test2: ## @test2 ## BB#0: addps %xmm0, %xmm0 pshufd $1, %xmm0, %xmm1 ## kill: XMM0<def> XMM0<kill> XMM0<def> insertps $0, %xmm0, %xmm0 insertps $16, %xmm1, %xmm0 addps %xmm0, %xmm0 ret This implements rdar://8230384 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112101 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-25ARM/Thumb2: Fix a misselect in getARMCmp, when attempting to adjust a signedDaniel Dunbar
comparison that would overflow. - The other under/overflow cases can't actually happen because the immediates which would trigger them are legal (so we don't enter this code), but adjusted the style to make it clear the transform is always valid. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112053 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-25Add another basic test cribbed from the x86 fast-isel tests.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112036 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-25Run this on thumb and arm.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112035 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-25Make this testcase actually executed with fast-isel on arm.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112033 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-25Convert test to use filecheck and make it more specificBruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112016 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-24Fix X86's isLegalAddressingMode to recognize that static addressesDan Gohman
need not be RIP-relative in small mode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111917 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-24Fix SPU BE to use all the available return registers.Kalle Raiskila
llc used to assert on the added testcase. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111911 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-23Add a new llvm.x86.int intrinsic, allowing access to the Chris Lattner
x86 int and int3 instructions. Patch by Peter Housel! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111831 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-21Fix x86 fast-isel's cmp+branch folding to avoid folding when theDan Gohman
comparison is in a different basic block from the branch. In such cases, the comparison's operands may not have initialized virtual registers available. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111709 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-20Replace some NEON vmovl intrinsic that I missed earlier.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111696 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-20Replace the arm.neon.vmovls and vmovlu intrinsics with vector sign-extend andBob Wilson
zero-extend operations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111614 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-19It's possible to sink a def if its local uses are PHI's.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111537 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-18When sending stats output to stdout for grepping, don't emit normalDan Gohman
output to standard output also. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111435 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-18When sending stats output to stdout for grepping, don't emit normalDan Gohman
output to standard output also. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111401 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-18Fix a bug with insertelement on SPU. Kalle Raiskila
The previous algorithm in LowerVECTOR_SHUFFLE didn't check all requirements for "monotonic" shuffles. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111361 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-18Remove all traces of v2[i,f]32 on SPU. Kalle Raiskila
The "half vectors" are now widened to full size by the legalizer. The only exception is in parameter passing, where half vectors are expanded. This causes changes to some dejagnu tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111360 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-18Change SPU C calling convention to match that described in Kalle Raiskila
"SPU Application Binary Interface Specification, v1.9" by IBM. Specifically: use r3-r74 to pass parameters and the return value. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111358 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-18Expand ZERO_EXTEND operations for NEON vector types.Bob Wilson
Testcase from Nick Lewycky. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111341 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-17Tweak IVUsers' concept of "interesting" to exclude add recurrencesDan Gohman
where the step value is an induction variable from an outer loop, to avoid trouble trying to re-expand such expressions. This effectively hides such expressions from indvars and lsr, which prevents them from getting into trouble. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111317 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-17Add nounwind.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111312 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-17Make fast scheduler handle asm clobbers correctly.Dale Johannesen
PR 7882. Follows suggestion by Amaury Pouly, thanks. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111306 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-17Change ARM PKHTB and PKHBT instructions to use a shift_imm operand to avoidBob Wilson
printing "lsl #0". This fixes the remaining parts of pr7792. Make corresponding changes for encoding/decoding these instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111251 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-17Allow more cases of undef shuffle indices and add tests for them.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111226 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-17PHI elimination should not break back edge. It can cause some significant ↵Evan Cheng
code placement issues. rdar://8263994 good: LBB0_2: mov r2, r0 . . . mov r1, r2 bne LBB0_2 bad: LBB0_2: mov r2, r0 . . . @ BB#3: mov r1, r2 b LBB0_2 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111221 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-16Add a testcase for svn 111208.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111212 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-16Generalize a pattern for PKHTB: an SRL of 16-31 bits will guaranteeBob Wilson
that the high halfword is zero. The shift need not be exactly 16 bits. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111196 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-16Convert test to FileCheck.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111195 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-16Convert a test to use FileCheck.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111153 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-15Test expects SSE, give him SSE.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111115 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-15Restore arch on these test, they fail on arm.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111109 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-15Mark as XFAIL on darwin 8. PR 7886.Dale Johannesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111108 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-13Temporarily disable tail calls on ARM to work around some linker problems.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111050 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-13Revert 110491. While not wrong, it was based on aDale Johannesen
misanalysis and is undesirable. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111028 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-12- Teach SSEDomainFix to switch between different levels of AVX instructions. ↵Bruno Cardoso Lopes
Here we guess that AVX will have domain issues, so just implement them for consistency and in the future we remove if it's unnecessary. - Make foldMemoryOperandImpl aware of 256-bit zero vectors folding and support the 128-bit counterparts of AVX too. - Make sure MOV[AU]PS instructions are only selected when SSE1 is enabled, and duplicate the patterns to match AVX. - Add a testcase for a simple 128-bit zero vector creation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110946 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-12Begin to support some vector operations for AVX 256-bit intructions. The longBruno Cardoso Lopes
term goal here is to be able to match enough of vector_shuffle and build_vector so all avx intrinsics which aren't mapped to their own built-ins but to shufflevector calls can be codegen'd. This is the first (baby) step, support building zeroed vectors. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110897 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-12This is x86 only test.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110887 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-11Add testcases for all AVX 256-bit intrinsics added in the last couple daysBruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110854 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-11Reapply r109881 using a more strict command line for llc.Bruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110833 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-11fix silly typoJim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110831 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-11Add a target triple, as the runtime library invocation varies a bit byJim Grosbach
platform. It's apparently "bl __muldf3" on linux, for example. Since that's not what we're checking here, it's more robust to just force a triple. We just wwant to check that the inline FP instructions are only generated on cpus that have them." git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110830 91177308-0d34-0410-b5e6-96231b3b80d8
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