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2010-10-08Change register allocation order for ARM VFP and NEON registers to put theBob Wilson
callee-saved registers at the end of the lists. Also prefer to avoid using the low registers that are in register subclasses required by certain instructions, so that those registers will more likely be available when needed. This change makes a huge improvement in spilling in some cases. Thanks to Jakob for helping me realize the problem. Most of this patch is fixing the testsuite. There are quite a few places where we're checking for specific registers. I changed those to wildcards in places where that doesn't weaken the tests. The spill-q.ll and thumb2-spill-q.ll tests stopped spilling with this change, so I added a bunch of live values to force spills on those tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116055 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-08testcase that goes with r116053Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116054 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-08rename testChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116052 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-08merge testsChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116051 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-08filecheckize.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116050 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-08reapply: Use the new TB_NOT_REVERSABLE flag instead of specialChris Lattner
reapply: reimplement the second half of the or/add optimization. We should now with no changes. Turns out that one missing "Defs = [EFLAGS]" can upset things a bit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116040 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-08Revert "reimplement the second half of the or/add optimization. We should now",Daniel Dunbar
which depends on r116007, which I am about to revert. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116031 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-08reimplement the second half of the or/add optimization. We should nowChris Lattner
only end up emitting LEA instead of OR. If we aren't able to promote something into an LEA, we should never be emitting it as an ADD. Add some testcases that we emit "or" in cases where we used to produce an "add". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116026 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-07convert cmp to use a multipatternChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115978 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-07Canonicalize X86ISD::MOVDDUP nodes to v2f64 to make sure all cases match. ↵Evan Cheng
Also eliminate unneeded isel patterns. rdar://8520311 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115977 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-07Allow use of the 16-bit literal move instruction in CMOVs for ARM mode.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115884 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-06- Add TargetInstrInfo::getOperandLatency() to compute operand latencies. ThisEvan Cheng
allow target to correctly compute latency for cases where static scheduling itineraries isn't sufficient. e.g. variable_ops instructions such as ARM::ldm. This also allows target without scheduling itineraries to compute operand latencies. e.g. X86 can return (approximated) latencies for high latency instructions such as division. - Compute operand latencies for those defined by load multiple instructions, e.g. ldm and those used by store multiple instructions, e.g. stm. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115755 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-05PSHUFW is in SSE, not SSSE3.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115691 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-05Use a more efficient lowering of uint64_t --> float that can take advantage ↵Owen Anderson
of hardware signed integer conversion without having to do a double cast (uint64_t --> double --> float). This is based on the algorithm from compiler_rt's __floatundisf for X86-64. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115634 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-05test/CodeGen/X86/atomic_op.ll: Rename @main to @func. Extra sequences will ↵NAKAMURA Takumi
be inserted to @main as prologue on cygming, to fail. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115611 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-03va_args support for Win64.Anton Korobeynikov
Patch by Cameron! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115480 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-03Properly emit stack probe on win64 (for non-mingw targets).Anton Korobeynikov
Based on the patch by Cameron Esfahani! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115479 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-03unbreak buildbotChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115476 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-03Add test to make sure that the MMX intrinsic calls make it out the other end inBill Wendling
tact. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115458 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-01Need to specify SSE4 for machines which don't have SSE4. The code checked ↵Bill Wendling
for is generated by SSE4. Otherwise, we get something else. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115352 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-01We must check for something.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115309 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-01Disable tests until I can figure out why they're failing on just two ↵Bill Wendling
machines but not others. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115308 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-01Try adding an mtriple.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115307 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-01Zap some redundant 'ori $?, $?, 0' from SPU.Kalle Raiskila
Also remove some code that died in the process. One now non-existant ori is checked for. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115306 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-01FileCheck-ize this test.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115304 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-01FileCheck-ize this test.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115303 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-01fix rdar://8494845 + PR8244 - a miscompile exposed by my patch in r101350Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115294 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-01One more +sse2.Dale Johannesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115293 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-01Mark all these as needing SSE2. Should fix PPC andDale Johannesen
maybe even Linux. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115291 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-01Disable these tests for now; it's not obvious why they fail on Linux.Dale Johannesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115257 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-01Make test not sensitive to register choice.Dale Johannesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115250 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-30Massive rewrite of MMX: Dale Johannesen
The x86_mmx type is used for MMX intrinsics, parameters and return values where these use MMX registers, and is also supported in load, store, and bitcast. Only the above operations generate MMX instructions, and optimizations do not operate on or produce MMX intrinsics. MMX-sized vectors <2 x i32> etc. are lowered to XMM or split into smaller pieces. Optimizations may occur on these forms and the result casted back to x86_mmx, provided the result feeds into a previous existing x86_mmx operation. The point of all this is prevent optimizations from introducing MMX operations, which is unsafe due to the EMMS problem. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115243 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-30test/CodeGen/X86/sibcall.ll: Add explicit triplets and remove XFAIL: ↵NAKAMURA Takumi
apple-darwin8. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115215 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-30Try again to disable critical edge splitting in CodeGenPrepare.Jakob Stoklund Olesen
The bug that broke i386 linux has been fixed in r115191. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115204 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-30When isel is emitting instructions for an x86 target without CMOV, the CFG isJakob Stoklund Olesen
edited during emission. If the basic block ends in a switch that gets lowered to a jump table, any phis at the default edge were getting updated wrong. The jump table data structure keeps a pointer to the header blocks that wasn't getting updated after the MBB is split. This bug was exposed on 32-bit Linux when disabling critical edge splitting in codegen prepare. The fix is to uipdate stale MBB pointers whenever a block is split during emission. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115191 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-30Tiny patch for proof-of-concept cleanup of ARMAsmPrinter::EmitStartOfAsmFile()Jason W Kim
Small test for sanity check of resulting ARM .s file. Tested against -r115129. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115133 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-29Increase ARM APCS preferred alignment for i64 and f64 from 32 bits to 64 bits.Bob Wilson
LDM/STM instructions can run one cycle faster on some ARM processors if the memory address is 64-bit aligned. Radar 8489376. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115047 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-29do not compare actual branch labels; this may fix ↵Gabor Greif
llvm-gcc-x86_64-darwin10-cross-mingw32 buildbot too git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115034 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-29improve heuristics to find the 'and' corresponding to 'tst' to also catch ↵Gabor Greif
opportunities on thumb2 added some doxygen on the way git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115033 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-28 And remove r114997's test.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115003 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-28Revert r114997. It was causing a failure on darwin10-selfhost.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115002 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-28Fix a FIXME. _foo.eh symbols are currently always exported so that the linkerBill Wendling
knows about them. This is not necessary on 10.6 and later. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114997 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-28Add a subtarget hook for reporting the misprediction penalty. Use this to ↵Owen Anderson
provide more precise cost modeling for if-conversion. Now if only we had a way to estimate the misprediction probability. Adjsut CodeGen/ARM/ifcvt10.ll. The pipeline on Cortex-A8 is long enough that it is still profitable to predicate an ldm, but the shorter pipeline on Cortex-A9 makes it unprofitable. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114995 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-28User proper libcall names & condcodes while compiling for ARM EABI.Anton Korobeynikov
Patch by Evzen Muller! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114991 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-28Part one of switching to using a more sane heuristic for determining ↵Owen Anderson
if-conversion profitability. Rather than having arbitrary cutoffs, actually try to cost model the conversion. For now, the constants are tuned to more or less match our existing behavior, but these will be changed to reflect realistic values as this work proceeds. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114973 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-28Add a command line option "-arm-strict-align" to disallow unaligned memoryBob Wilson
accesses for ARM targets that would otherwise allow it. Radar 8465431. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114941 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-27Revert "Disable codegen prepare critical edge splitting. Machine instruction ↵Jakob Stoklund Olesen
passes now" This reverts revision 114633. It was breaking llvm-gcc-i386-linux-selfhost. It seems there is a downstream bug that is exposed by -cgp-critical-edge-splitting=0. When that bug is fixed, this patch can go back in. Note that the changes to tailcallfp2.ll are not reverted. They were good are required. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114859 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-27Explicitly disable CGP critical edge splitting for this test so it won't breakJakob Stoklund Olesen
by reenabling it temporarily. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114858 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-27Don't depend on basic block numbering.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114857 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-27the latest assembler that runs on powerpc 10.4 machines doesn'tChris Lattner
support aligned comm. Detect when compiling for 10.4 and don't emit an alignment for comm. THis will hopefully fix PR8198. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114817 91177308-0d34-0410-b5e6-96231b3b80d8
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