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2011-01-20Add test.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123906 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-20Sorry, several patches in one.Evan Cheng
TargetInstrInfo: Change produceSameValue() to take MachineRegisterInfo as an optional argument. When in SSA form, targets can use it to make more aggressive equality analysis. Machine LICM: 1. Eliminate isLoadFromConstantMemory, use MI.isInvariantLoad instead. 2. Fix a bug which prevent CSE of instructions which are not re-materializable. 3. Use improved form of produceSameValue. ARM: 1. Teach ARM produceSameValue to look pass some PIC labels. 2. Look for operands from different loads of different constant pool entries which have same values. 3. Re-implement PIC GA materialization using movw + movt. Combine the pair with a "add pc" or "ldr [pc]" to form pseudo instructions. This makes it possible to re-materialize the instruction, allow machine LICM to hoist the set of instructions out of the loop and make it possible to CSE them. It's a bit hacky, but it significantly improve code quality. 4. Some minor bug fixes as well. With the fixes, using movw + movt to materialize GAs significantly outperform the load from constantpool method. 186.crafty and 255.vortex improved > 20%, 254.gap and 176.gcc ~10%. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123905 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-20Sparc backend: Implements a delay slot filler that attempt to fill delay slotsVenkatraman Govindaraju
with useful instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123884 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-20If we can, lower the multiply part of a umulo/smulo call to a libcallEric Christopher
with an invalid type then split the result and perform the overflow check normally. Fixes the 32-bit parts of rdar://8622122 and rdar://8774702. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123864 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-20Fix debug info for merged global.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123862 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-18fix rdar://8878965, a regression I introduced with the recentChris Lattner
llvm.objectsize changes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123771 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-18Add support for mips32 madd and msub instructions. Patch by Akira HatanakaBruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123760 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-17Fix an off-by-one error in ctpop combining.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123664 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-17Add a DAGCombine to turn (ctpop x) u< 2 into (x & x-1) == 0.Benjamin Kramer
This shaves off 4 popcounts from the hacked 186.crafty source. This is enabled even when a native popcount instruction is available. The combined code is one operation longer but it should be faster nevertheless. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123621 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-17Don't crash SPU BE with memory accesses with big alignmnet.Kalle Raiskila
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123620 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-17Materialize GA addresses with movw + movt pairs for Darwin in PIC mode. e.g.Evan Cheng
movw r0, :lower16:(L_foo$non_lazy_ptr-(LPC0_0+4)) movt r0, :upper16:(L_foo$non_lazy_ptr-(LPC0_0+4)) LPC0_0: add r0, pc, r0 It's not yet enabled by default as some tests are failing. I suspect bugs in down stream tools. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123619 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-16Update tests.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123591 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-16fix PR8514, a bug where the "heroic" transformation of shift/and Chris Lattner
into and/shift would cause nodes to move around and a dangling pointer to happen. The code tried to avoid this with a HandleSDNode, but got the details wrong. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123578 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-16Spill R4 if it's going to be used to restore SP from FP.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123567 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-16Implement AnalyzeBranch in Sparc Backend.Venkatraman Govindaraju
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123561 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-16fix PR8981, a crash trying to form a conditional inc with a floating point ↵Chris Lattner
compare. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123560 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-16reapply my fix for PR8961 with a tweak to properly handleChris Lattner
multi-instruction sequences like calls. Many thanks to Jakob for finding a testcase. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123559 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-14revert my fastisel patch again which apparently still gives theChris Lattner
llvm-gcc-i386-linux-selfhost buildbot heartburn... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123431 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-14reapply r123414 now that the botz are calmed down and the fix is already in.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123427 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-14r123414 broke llvm-gcc bootstrap apparently, revertChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123422 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-14fix PR8961 - a fast isel miscompilation where we'd insert a new instructionChris Lattner
after sext's generated for addressing that got folded. Previously we compiled test5 into: _test5: ## @test5 ## BB#0: movq -8(%rsp), %rax ## 8-byte Reload movq (%rdi,%rax), %rdi addq %rdx, %rdi movslq %esi, %rax movq %rax, -8(%rsp) ## 8-byte Spill movq %rdi, %rax ret which is insane and wrong. Now we produce: _test5: ## @test5 ## BB#0: movslq %esi, %rax movq (%rdi,%rax), %rax addq %rdx, %rax ret git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123414 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13Experiment with changing the default 32-bit linux stack alignment toEric Christopher
16 bytes for PR8969. Update all testcases accordingly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123367 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-12Try again enabling LiveDebugVariables.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123342 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-12Implement RETURNADDR and FRAMEADDR lowering in SPARC backend.Venkatraman Govindaraju
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123310 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-12Fix SPARC backend call instruction so that arguments passed through registersVenkatraman Govindaraju
are correctly marked as used instead of passing all possible argument registers as used. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123301 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-11The world is not ready for LiveDebugVariables yet.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123290 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-11Enable LiveDebugVariables by default.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123282 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-11SPARC backend: correct ICC/FCC uses for ADDX and SELECT_CCVenkatraman Govindaraju
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123281 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-11Even if we don't have 7 bytes of stack space we may need to save andEric Christopher
restore the stack pointer from the frame pointer on thumbv6. Fixes rdar://8819685 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123196 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-10Fix PR 8916 (qv for analysis), at least the immediate problem.Dale Johannesen
There's an inherent tension in DAGCombine between assuming that things will be put in canonical form, and the Depth mechanism that disables transformations when recursion gets too deep. It would not surprise me if there's a lot of little bugs like this one waiting to be discovered. The mechanism seems fragile and I'd suggest looking at it from a design viewpoint. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123191 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-08Recognize inline asm 'rev /bin/bash, ' as a bswap intrinsic call.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123048 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-07Do not model all INLINEASM instructions as having unmodelled side effects.Evan Cheng
Instead encode llvm IR level property "HasSideEffects" in an operand (shared with IsAlignStack). Added MachineInstrs::hasUnmodeledSideEffects() to check the operand when the instruction is an INLINEASM. This allows memory instructions to be moved around INLINEASM instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123044 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-07Speculatively revert r123032.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123039 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-07Lower some BUILD_VECTORS using VEXT+shuffle.Bob Wilson
Patch by Tim Northover. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123035 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-07Appropriately truncate debug info range in dwarf output.Devang Patel
Enable live debug variables pass. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123032 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-07Revert r122955. It seems using movups to lower memcpy can cause massive ↵Evan Cheng
regression (even on Nehalem) in edge cases. I also didn't see any real performance benefit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123015 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-07Try to unbreak the arm buildbot.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122999 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-07Add testcases for PR8411 (vget_low and vget_high implemented as shuffles).Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122997 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-07Add ARM patterns to match EXTRACT_SUBVECTOR nodes.Bob Wilson
Also fix an off-by-one in SelectionDAGBuilder that was preventing shuffle vectors from being translated to EXTRACT_SUBVECTOR. Patch by Tim Northover. The test changes are needed to keep those spill-q tests from testing aligned spills and restores. If the only aligned stack objects are spill slots, we no longer realign the stack frame. Prior to this patch, an EXTRACT_SUBVECTOR was legalized by loading from the stack, which created an aligned frame index. Now, however, there is nothing except the spill slot in the stack frame, so I added an aligned alloca. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122995 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-06Fix the other problem reported in PR8582. Testcase and patch byDuncan Sands
Nadav Rotem. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122983 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-06Add a testcase for PR8582, which mysteriously fixed itself, in case the problemDuncan Sands
comes back some day. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122982 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-06PR8921: LDM/POP do not support interworking prior to v5t.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122970 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-06Use movups to lower memcpy and memset even if it's not fast (like corei7).Evan Cheng
The theory is it's still faster than a pair of movq / a quad of movl. This will probably hurt older chips like P4 but should run faster on current and future Intel processors. rdar://8817010 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122955 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-06Re-implement r122936 with proper target hooks. Now getMaxStoresPerMemcpyEvan Cheng
etc. takes an option OptSize. If OptSize is true, it would return the inline limit for functions with attribute OptSize. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122952 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-06Revert r122936. I'll re-implement the change.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122949 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-06Fix test to coincide with r122934 change from PR8919.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122937 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-06r105228 reduced the memcpy / memset inline limit to 4 with -Os to avoid blowingEvan Cheng
up freebsd bootloader. However, this doesn't make much sense for Darwin, whose -Os is meant to optimize for size only if it doesn't hurt performance. rdar://8821501 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122936 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-06Avoid zero extend bit test operands to pointer type if all the masks fit inEvan Cheng
the original type of the switch statement key. rdar://8781238 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122935 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-05Optimize:Evan Cheng
r1025 = s/zext r1024, 4 r1026 = extract_subreg r1025, 4 to: r1026 = copy r1024 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122925 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-05fix PR8900, a shuffle miscompilation. Patch by Nadav Rotem!Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122921 91177308-0d34-0410-b5e6-96231b3b80d8
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