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AgeCommit message (Expand)Author
2012-10-17Revert r166049Michael Liao
2012-10-17Add conditional branch instructions and their patterns.Reed Kotler
2012-10-17Teach DAG combine to fold (extract_subvec (concat v1, ..) i) to v_iMichael Liao
2012-10-17Fix fallout from RegInfo => FrameLowering refactoring on MSP430.Anton Korobeynikov
2012-10-17Fix setjmp on models with non-Small code model nor non-Static relocation modelMichael Liao
2012-10-16Avoid rematerializing a redef immediately after the old def.Jakob Stoklund Olesen
2012-10-16Revert r166046 "Switch back to the old coalescer for now to fix the 32 bit bit"Jakob Stoklund Olesen
2012-10-16Teach DAG combine to fold (trunc (fptoXi x)) to (fptoXi x)Michael Liao
2012-10-16Switch back to the old coalescer for now to fix the 32 bit bitRafael Espindola
2012-10-16This patch addresses PR13949.Bill Schmidt
2012-10-16Issue:Stepan Dyatkovskiy
2012-10-16Reapply r165661, Patch by Shuxin Yang <shuxin.llvm@gmail.com>.NAKAMURA Takumi
2012-10-16Fix the cpu name and add -verify-machineinstrs.Rafael Espindola
2012-10-16misched: Added handleMove support for updating all kill flags, not just for a...Andrew Trick
2012-10-15Add __builtin_setjmp/_longjmp supprt in X86 backendMichael Liao
2012-10-15ARM: v1i64 and v2i64 VBSL intrinsic support.Jim Grosbach
2012-10-15Check output of the misched unit testsAndrew Trick
2012-10-15Add a cpu to try to fix the atom builder.Rafael Espindola
2012-10-15Add testcase for pr14088.Rafael Espindola
2012-10-15misched tests: add a triple to speculatively fix windows builders.Andrew Trick
2012-10-15misched: ILP scheduler for experimental heuristics.Andrew Trick
2012-10-15Fixed PR13938: the ARM backend was crashing because it couldn't select a VDUP...Silviu Baranga
2012-10-13Drop <def,dead> flags when merging into an unused lane.Jakob Stoklund Olesen
2012-10-13Allow for loops in LiveIntervals::pruneValue().Jakob Stoklund Olesen
2012-10-13X86: Fix accidentally swapped operands.Benjamin Kramer
2012-10-13X86: Promote i8 cmov when both operands are coming from truncates of the same...Benjamin Kramer
2012-10-12ARM: tail-call inside a function where part of a byval argument is on caller'sManman Ren
2012-10-12Fix buildbots: -misched=shuffle is only available in +Asserts builds.Jakob Stoklund Olesen
2012-10-12ARM: Mark VSELECT as 'expand'.Jim Grosbach
2012-10-12Use a transposed algorithm for handleMove().Jakob Stoklund Olesen
2012-10-12Fix coalescing with IMPLICIT_DEF values.Jakob Stoklund Olesen
2012-10-12llvm/test/CodeGen/PowerPC/2012-10-12-bitcast.ll: Try to fix failure on non-pp...NAKAMURA Takumi
2012-10-12Fix big-endian codegen bug in DAGTypeLegalizer::ExpandRes_BITCASTUlrich Weigand
2012-10-12Div, Rem int/unsigned int Reed Kotler
2012-10-12Legalizer optimize a pair of div / mod to a call to divrem libcall if they areEvan Cheng
2012-10-11Pass an explicit operand number to addLiveIns.Jakob Stoklund Olesen
2012-10-11This patch addresses PR13947.Bill Schmidt
2012-10-11Revert r165661, "Patch by Shuxin Yang <shuxin.llvm@gmail.com>."NAKAMURA Takumi
2012-10-10Add isel patterns for v2f32 / v4f32 neon.vbsl intrinsics. rdar://12471808Evan Cheng
2012-10-10Add -mattr=+altivec and remove XFAIL.Bill Schmidt
2012-10-10XFAIL for all targets pending investigationBill Schmidt
2012-10-10Patch by Shuxin Yang <shuxin.llvm@gmail.com>.Nadav Rotem
2012-10-10When generating spill and reload code for vector registers on PowerPC,Bill Schmidt
2012-10-10The PowerPC VRSAVE register has been somewhat of an odd beast sinceBill Schmidt
2012-10-10Specify CPU model to avoid breaking ATOM buildsMichael Liao
2012-10-10Add support for FP_ROUND from v2f64 to v2f32Michael Liao
2012-10-10Fix for LDRB instruction:Stepan Dyatkovskiy
2012-10-10Issue description:Stepan Dyatkovskiy
2012-10-10Implement MipsTargetLowering::CanLowerReturn.Akira Hatanaka
2012-10-09When expanding atomic load arith instructions, do not lose target flags. rdar...Evan Cheng
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