aboutsummaryrefslogtreecommitdiff
path: root/test/CodeGen
AgeCommit message (Expand)Author
2012-12-11Add a triple to this test.Chad Rosier
2012-12-11Fix a miscompile in the DAG combiner. Previously, we would incorrectlyChandler Carruth
2012-12-11move X86-specific testPaul Redmond
2012-12-11Fall back to the selection dag isel to select tail calls.Chad Rosier
2012-12-10Some enhancements for memcpy / memset inline expansion.Evan Cheng
2012-12-10Use GetUnderlyingObjects in mischedHal Finkel
2012-12-10Teach DAG combine to handle vector add/sub with vectors of all 0s.Craig Topper
2012-12-08Teach DAG combine to handle vector logical operations with vectors of all 1s ...Craig Topper
2012-12-07When we use the BLEND instruction that uses the MSB as a mask, we can removeNadav Rotem
2012-12-07In hexagon convertToHardwareLoop, don't deref end() iteratorMatthew Curtis
2012-12-07X86: Prefer using VPSHUFD over VPERMIL because it has better throughput.Nadav Rotem
2012-12-07Added Mapping Symbols for ARM ELFTim Northover
2012-12-06Fix typos in CHECK lines.Dmitri Gribenko
2012-12-06Fix a bug in the code that merges consecutive stores. Previously we did notNadav Rotem
2012-12-06Remove intrinsic specific instructions for (V)MOVQUmr with patterns pointing ...Craig Topper
2012-12-06Properly fix the tes.Evan Cheng
2012-12-06llvm/test/CodeGen/ARM/extload-knownzero.ll: Try to unbreak, to add -O0. I gue...NAKAMURA Takumi
2012-12-06[arm fast-isel] Make the fast-isel implementation of memcpy respect alignment.Chad Rosier
2012-12-06Let targets provide hooks that compute known zero and ones for any_extendEvan Cheng
2012-12-05RegisterPressureTracker: fix findUseBetween to handle DebugValueAndrew Trick
2012-12-05RegisterPresssureTracker: Track live physical register by unit.Andrew Trick
2012-12-05[NVPTX] Fix crash with unnamed struct argumentsJustin Holewinski
2012-12-05Use multiclass to define store instructions with base+immediate offsetJyotsna Verma
2012-12-05Simplified BLEND pattern matching for shuffles.Elena Demikhovsky
2012-12-05Add x86 isel lowering logic to form bit test with inverted condition. e.g.Evan Cheng
2012-12-04ARM custom lower ctpop for vector types. Patch by Pete Couperus.Evan Cheng
2012-12-04Use the 'count' attribute to calculate the upper bound of an array.Bill Wendling
2012-12-04This patch introduces initial-exec model support for thread-local storageBill Schmidt
2012-12-04Add a 'count' field to the DWARF subrange.Bill Wendling
2012-12-04Stack Alignment: when creating stack objects in MachineFrameInfo, make sureManman Ren
2012-12-02Allow merging multiple store sequences on the same chain.Nadav Rotem
2012-12-02Fix an invalid regex in the testEli Bendersky
2012-12-01misched: Fix RegisterPressureTracker handling of DebugVals.Andrew Trick
2012-12-01misched: Fix the DAG builder to handle an undef operand at ExitSU.Andrew Trick
2012-12-01misched: Fix LiveInterval update to better handle DebugVal.Andrew Trick
2012-12-01misched: fix RegionBegin when DebugValues get shuffled to the top.Andrew Trick
2012-12-01Simplify REG_SEQUENCE lowering.Jakob Stoklund Olesen
2012-11-30test/CodeGen/PowerPC/vec_mul.ll: Add a triple. Thanks, Hal.Chad Rosier
2012-11-30Codegen failure for vmull with small vectorsSebastian Pop
2012-11-30test/CodeGen/PowerPC/vec_mul.ll: Fix register operands.Chad Rosier
2012-11-30test/CodeGen/PowerPC: Add explicit -march=ppc32.NAKAMURA Takumi
2012-11-30This patch fixes the Altivec addend construction for the fused multiply-addAdhemerval Zanella
2012-11-29Handle the situation where CodeGenPrepare removes a reference to a BB that hasBill Wendling
2012-11-29Added atomic 64 min/max/umin/umax instrinsics support in the ARM backend.Silviu Baranga
2012-11-29Teach the legalizer how to handle operands for VSELECT nodesJustin Holewinski
2012-11-29Allow targets to prefer TypeSplitVector over TypePromoteInteger when computin...Justin Holewinski
2012-11-29Avoid rewriting instructions twice.Jakob Stoklund Olesen
2012-11-29When combining consecutive stores allow loads in between the stores, if the l...Nadav Rotem
2012-11-28ARM: Implement CanLowerReturn so large vectors get expanded into sret.Benjamin Kramer
2012-11-28misched: Analysis that partitions the DAG into subtrees.Andrew Trick