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path: root/test/CodeGen/X86/vec_shuffle-38.ll
AgeCommit message (Collapse)Author
2012-07-12The LIT tests below do not specify the exact cpu model and fail on AVX2 ↵Nadav Rotem
machines, because we select different instructions such as vbroadcast, new shuffles, etc. Patch by Michael Liao. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160129 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-29Add another missing pattern. llvm-gcc likes f64 but clang likes i64 so it ↵Evan Cheng
was generating poor code for some SSE builtins. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145448 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-08test/CodeGen/X86/vec_shuffle-38.ll: Relax expression for Win32 x64.NAKAMURA Takumi
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144067 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-08Add x86 isel logic and patterns to match movlps from clang generated IR for ↵Evan Cheng
_mm_loadl_pi(). rdar://10134392, rdar://10050222 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144052 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-14Vector shuffle mask <i32 4, i32 5, i32 2, i32 3> should yield "movsd", not ↵Bruno Cardoso Lopes
"movss". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139686 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-31Fix (movhps load) lowering / pattern to match more cases. rdar://10050549Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138848 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-22Turn shuffles into unpacks for VT == MVT::v2i64 and MVT::v2f64Rafael Espindola
too. Patch by Jeff Muizelaar. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135789 91177308-0d34-0410-b5e6-96231b3b80d8
generated by cgit v1.2.3-70-g09d2 (git 2.46.0) at 2025-09-02 00:51:06 +0000