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2012-05-29Add intrinsics, code gen, assembler and disassembler support for the SSE4a ↵Benjamin Kramer
extrq and insertq instructions. This required light surgery on the assembler and disassembler because the instructions use an uncommon encoding. They are the only two instructions in x86 that use register operands and two immediates. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157634 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-27These tests used intrinsics with the wrong prototype. They weren't caught ↵Chris Lattner
because the old verifier just checked that something "was a pointer", but not that the pointee was correct. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157544 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-07Add SSE4A MOVNTSS/MOVNTSD instructions.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156281 91177308-0d34-0410-b5e6-96231b3b80d8