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2012-07-18Mips specific inline asm operand modifier 'M':Jack Carter
Print the high order register of a double word register operand. In 32 bit mode, a 64 bit double word integer will be represented by 2 32 bit registers. This modifier causes the high order register to be used in the asm expression. It is useful if you are using doubles in assembler and continue to control register to variable relationships. This patch also fixes a related bug in a previous patch: case 'D': // Second part of a double word register operand case 'L': // Low order register of a double word register operand case 'M': // High order register of a double word register operand I got 'D' and 'M' confused. The second part of a double word operand will only match 'M' for one of the endianesses. I had 'L' and 'D' be the opposite twins when 'L' and 'M' are. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160429 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-16Fix function select_cc_f32 in test/CodeGen/Mips/selectcc.ll.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160329 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-11Test case for r160036.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160067 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-11Implement MipsTargetLowering::LowerSELECT_CC to custom lower SELECT_CC.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160064 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-11Lower RETURNADDR node in Mips backend.Akira Hatanaka
Patch by Sasa Stankovic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160031 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-10 Mips specific inline asm operand modifier 'L'.Jack Carter
Low order register of a double word register operand. Operands are defined by the name of the variable they are marked with in the inline assembler code. This is a way to specify that the operand just refers to the low order register for that variable. It is the opposite of modifier 'D' which specifies the high order register. Example: main() { long long ll_input = 0x1111222233334444LL; long long ll_val = 3; int i_result = 0; __asm__ __volatile__( "or %0, %L1, %2" : "=r" (i_result) : "r" (ll_input), "r" (ll_val)); } Which results in: lui $2, %hi(_gp_disp) addiu $2, $2, %lo(_gp_disp) addiu $sp, $sp, -8 addu $2, $2, $25 sw $2, 0($sp) lui $2, 13107 ori $3, $2, 17476 <-- Low 32 bits of ll_input lui $2, 4369 ori $4, $2, 8738 <-- High 32 bits of ll_input addiu $5, $zero, 3 <-- Low 32 bits of ll_val addiu $2, $zero, 0 <-- High 32 bits of ll_val #APP or $3, $4, $5 <-- or i_result, high 32 ll_input, low 32 of ll_val #NO_APP addiu $sp, $sp, 8 jr $ra If not direction is done for the long long for 32 bit variables results in using the low 32 bits as ll_val shows. There is an existing bug if 'L' or 'D' is used for the destination register for 32 bit long longs in that the target value will be updated incorrectly for the non-specified part unless explicitly set within the inline asm code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160028 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-10Make register Mips::RA allocatable if not in mips16 mode.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159971 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-05 Mips specific inline asm operand modifier D.Jack Carter
Print the second half of a double word operand. The include list was cleaned up a bit as well. Also the test case was modified to test for both big and little patterns. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159787 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-05test case for r159770.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159771 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-02 mips32 long long register inline asm constraint support.Jack Carter
inlineasm-cnstrnt-bad-r-1.ll is NOT supposed to fail, so it was removed. This resulted in the removal of a negative test (inlineasm-cnstrnt-bad-r-1.ll) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159625 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-02Revert " mips32 long long register inline asm constraint support." asEric Christopher
it appears to be breaking the bots. This reverts commit 1b055ce320fa13f6f1ac81670d11b45e01f79876. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159619 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-02deleted test/CodeGen/Mips/inlineasm-cnstrnt-bad-r-1.llJack Carter
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159617 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-02 mips32 long long register inline asm constraint support.Jack Carter
inlineasm-cnstrnt-bad-r-1.ll is NOT supposed to fail, so it was removed. This resulted in the removal of a negative test (inlineasm-cnstrnt-bad-r-1.ll) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159610 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-02Fix the remaining TCL-style quotes found in the testsuite. This isChandler Carruth
another mechanical change accomplished though the power of terrible Perl scripts. I have manually switched some "s to 's to make escaping simpler. While I started this to fix tests that aren't run in all configurations, the massive number of tests is due to a really frustrating fragility of our testing infrastructure: things like 'grep -v', 'not grep', and 'expected failures' can mask broken tests all too easily. Essentially, I'm deeply disturbed that I can change the testsuite so radically without causing any change in results for most platforms. =/ git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159547 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-28The Mips specific inline asm operand modifier 'z' has theJack Carter
following description in the gnu sources: Print $0 if operand is zero otherwise print the op normally. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159324 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-27Test case for r159240.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159242 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-23Extend the IL for selecting TLS models (PR9788)Hans Wennborg
This allows the user/front-end to specify a model that is better than what LLVM would choose by default. For example, a variable might be declared as @x = thread_local(initialexec) global i32 42 if it will not be used in a shared library that is dlopen'ed. If the specified model isn't supported by the target, or if LLVM can make a better choice, a different model may be used. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159077 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-23Handle aliases to tls variables in all architectures, not just x86.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159058 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-21The inline asm operand modifier 'n' is suppose Jack Carter
to be generic across architectures. It has the following description in the gnu sources: Negate the immediate constant Several Architectures such as x86 have local implementations of operand modifier 'n' which go beyond the above description slightly. This won't affect them. Affected files: lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp Added 'n' to the switch cases. test/CodeGen/Generic/asm-large-immediate.ll Generic compiled test (x86 for me) test/CodeGen/Mips/asm-large-immediate.ll Mips compiled version of the generic one Contributer: Jack Carter git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158939 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-211. fix null program output after some other changesAkira Hatanaka
2. re-enable null.ll test 3. fix some minor style violations Patch by Reed Kotler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158935 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-21The inline asm operand modifier 'c' is suppose Jack Carter
to be generic across architectures. It has the following description in the gnu sources: Substitute immediate value without immediate syntax Several Architectures such as x86 have local implementations of operand modifier 'c' which go beyond the above description slightly. To make use of the generic modifiers without overriding local implementation one can make a call to the base class method for AsmPrinter::PrintAsmOperand() in the locally derived method's "default" case in the switch statement. That way if it is already defined locally the generic version will never get called. This change is needed when test/CodeGen/generic/asm-large-immediate.ll failed on a native Mips board. The test was assuming a generic implementation was in place. Affected files: lib/Target/Mips/MipsAsmPrinter.cpp: Changed the default case to call the base method. lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp Added 'c' to the switch cases. test/CodeGen/Mips/asm-large-immediate.ll Mips compiled version of the generic one Contributer: Jack Carter git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158925 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-141. introduce MipsPat in place of Pat in order to exclude those fromAkira Hatanaka
being used by Mips16 or Micro Mips 2. clean up a few lines too long encountered Patch by Reed Kotler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158470 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-14Make machine verifier check the first instruction of the last bundle instead ofAkira Hatanaka
the last instruction of a basic block. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158468 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-14Test case for MIPS long branch pass.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158438 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-14Fix test cases.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158435 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-13Implement a DAGCombine in MipsISelLowering.cpp which transforms the followingAkira Hatanaka
pattern: (add v0, (add v1, abs_lo(tjt))) => (add (add v0, v1), abs_lo(tjt)) "tjt" is a TargetJumpTable node. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158419 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-13Set a higher value for maxStoresPerMemcpy in MipsISelLowering.cpp.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158414 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-13Implement fastcc calling convention for MIPS.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158410 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-13disable use of directive .set nomicromipsAkira Hatanaka
until this directive is pushed in gas to open source fsf Patch by Reed Kotler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158381 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-04Add a test case for mips64 unaligned load/store instructions.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157939 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-04Rename test/CodeGen/Mips/load-shift-left-right.ll.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157938 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-02Add another test case which tests Mips' unaligned load/store instructions.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157874 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-02Fix test cases in test/CodeGen/Mips.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157868 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-30Add support for the mips inline asm 'm' output modifier.Eric Christopher
Patch by Jack Carter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157709 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-24Turn on mips16 pseudo op when compiling for mips16.Akira Hatanaka
Expand test case for this. Patch by Reed Kotler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157410 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-24Enable Mips16 compiler to compile a null program.Akira Hatanaka
First code from the Mips16 compiler. Includes trivial test program. Patch by Reed Kotler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157408 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-19Add support for the 'd' mips inline asm output modifier.Eric Christopher
Patch by Jack Carter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157093 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-18Add support for the mips 'x' inline asm modifier.Eric Christopher
Patch by Jack Carter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157057 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-12Fix test cases.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156697 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-12Make the following changes in MipsAsmPrinter.cpp:Akira Hatanaka
- Remove code which lowers pseudo SETGP01. - Fix LowerSETGP01. The first two of the three instructions that are emitted to initialize the global pointer register now use register $2. - Stop emitting .cpload directive. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156689 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-12Insert instructions to the entry basic block which initializes the globalAkira Hatanaka
pointer register. This is the first of the series of patches which clean up the way global pointer register is used. The patches will make the following improvements: - Make $gp an allocatable temporary register rather than reserving it. - Use a virtual register as the global pointer register and let the register allocator decide which register to assign to it or whether spill/reloads are needed. - Make sure $gp is valid at the entry of a called function, which is necessary for functions using lazy binding. - Remove the need for emitting .cprestore and .cpload directives. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156671 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-11Do not replace operands of pseudo instructions with register $zero.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156663 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-11Use regular expression to match register names. Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156656 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-10Add support for the 'X' inline asm operand modifier.Eric Christopher
Patch by Jack Carter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156577 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-09Add another peephole pattern for conditional moves.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156460 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-09Make register FP allocatable if the compiled function does not have dynamicAkira Hatanaka
allocas. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156458 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-09Expand 64-bit shifts if target ABI is O32.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156457 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-07Add support for the 'l' constraint.Eric Christopher
Patch by Jack Carter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156294 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-07Add support for the 'c' constraint.Eric Christopher
Patch by Jack Carter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156293 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-07Add support for the 'P' constraint.Eric Christopher
Patch by Jack Carter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156292 91177308-0d34-0410-b5e6-96231b3b80d8
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