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2013-03-18Remove unnecessary leading comment characters in lit-only fileDavid Blaikie
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177327 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-18Include '.test' suffix in target specific lit configs that need itDavid Blaikie
Apparently my final cleanup to use a relevant suffix for these tests before committing r176831 caused them to stop running since lit wasn't configured to run tests with that suffix in those directories (why don't we just have a global suffix list?). So, add the suffix to the relevant directories & fix the test that has bitrotted over the last week due to my debug info schema changes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177315 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-11Remove duplicate test contents.David Blaikie
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176831 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-09Test case hygiene.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176772 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-06[mips] Custom-legalize BR_JT.Akira Hatanaka
In N64-static, GOT address is needed to compute the branch address. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176580 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-06[mips] Add a line which checks function name. Rename file.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176543 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-05[mips] Remove android calling convention.Akira Hatanaka
This calling convention was added just to handle functions which return vector of floats. The fix committed in r165585 solves the problem. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176530 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-05[mips] Fix MipsCC::analyzeReturn so that, in soft-float mode, fp128 getsAkira Hatanaka
returned in registers $2 and $4. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176527 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-05[mips] Fix MipsTargetLowering::LowerCallResult and LowerReturn to correctlyAkira Hatanaka
handle fp128 returns. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176523 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-05[mips] Fix MipsTargetLowering::LowerCall to pass fp128 arguments in floatingAkira Hatanaka
point registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176521 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-05[mips] Correct handling of fp128 (long double) formals and read long doubleAkira Hatanaka
parameters from floating point registers if target is mips64 hard float. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176520 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-05llvm/test/CodeGen/Mips/mips64-f128.ll: Add explicit ↵NAKAMURA Takumi
-mtriple=mips64el-unknown-unknown to appease win32. FIXME: Is it expected for win32 to affect mips targets? git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176471 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-04[mips] Print move instructions.Akira Hatanaka
"move $4, $5" is printed instead of "or $4, $5, $zero". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176455 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-04Mips specific inline assembler constraint 'R'Jack Carter
'R' An address that can be sued in a non-macro load or store. This patch includes a positive test case. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176452 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-01[mips] Fix inefficient code generation.Akira Hatanaka
This patch eliminates the need to emit a constant move instruction when this pattern is matched: (select (setgt a, Constant), T, F) The pattern above effectively turns into this: (conditional-move (setlt a, Constant + 1), F, T) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176384 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-01Set properties for f128 type.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176378 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-01[mips] Remove unused option. Fix 80-column violations.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176330 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-01[mips] Add the capability to search delay slot filling instructions inAkira Hatanaka
successor basic blocks. Currently this is off by default. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176329 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-01[mips] Add capability to search in the forward direction for instructions thatAkira Hatanaka
can fill the delay slot. Currently, this is off by default. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176320 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-01[mips] Define class MemDefsUses.Akira Hatanaka
This class tracks dependence between memory instructions using underlying objects of memory operands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176313 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-23Expand pseudos/macros for Selt. This is the last of the complexReed Kotler
macros.The rest is some small misc. stuff. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175950 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-22[mips] Emit call16 operator instead of got_disp. The former allows lazy binding.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175920 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-22Expand mips16 SelT form pseudso/macros.Reed Kotler
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175862 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21Expand the sel pseudo/macro. This generates basic blocks where previouslyReed Kotler
there were inline br .+4 instructions. Soon everything can enjoy the full instruction scheduling experience. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175718 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-20Expand pseudos/macros:Reed Kotler
SltCCRxRy16, SltiCCRxImmX16, SltiuCCRxImmX16, SltuCCRxRy16 $T8 shows up as register $24 when emitted from C++ code so we had to change some tests that were already there for this functionality. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175593 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-19Expand pseudos/macros BteqzT8SltiX16, BteqzT8SltiuX16,Reed Kotler
BtnezT8SltiX16, BtnezT8SltiuX16 . git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175486 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-19Expand pseudos BteqzT8CmpiX16 and BtnezT8CmpiX16.Reed Kotler
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175474 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-18Expand macro/pseudo instructions BtnezT8SltX16 and BtnezT8SltuX16.Reed Kotler
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175420 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-18Expand pseudo/macro BteqzT8SltX16.Reed Kotler
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175417 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-18Expand macro/pseudo BteqzT8CmpX16.Reed Kotler
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175416 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-18Beginning of expanding all current mips16 macro/pseudo instruction sequences.Reed Kotler
This expansion will be moved to expandISelPseudos as soon as I can figure out how to do that. There are other instructions which use this ExpandFEXT_T8I816_ins and as soon as I have finished expanding them all, I will delete the macro asm string text so it has no way to be used in the future. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175413 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-15Fix minor mips16 issues in directives for function prologue. Probably this doesReed Kotler
not matter but makes it more gcc compatible which avoids possible subtle problems. Also, turned back on a disabled check in helloworld.ll. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175237 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-13For Mips 16, add the optimization where the 16 bit form of addiu sp can be usedReed Kotler
if the offset fits in 11 bits. This makes use of the fact that the abi requires sp to be 8 byte aligned so the actual offset can fit in 8 bits. It will be shifted left and sign extended before being actually used. The assembler or direct object emitter will shift right the 11 bit signed field by 3 bits. We don't need to deal with that here. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175073 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-13Make jumptables work for -staticReed Kotler
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175044 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-08Add the 16 bit version of addiu. To the assembler, the 16 and 32 bit are theReed Kotler
same so we put in the comment field an indicator when we think we are emitting the 16 bit version. For the direct object emitter, the difference is important as well as for other passes which need an accurate count of program size. There will be other similar putbacks to this for various instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174747 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-08When Mips16 frames grow large, the immediate field may exceed the maximumReed Kotler
allowed size for the instruction. This code uses RegScavenger to fix this. We sometimes need 2 registers for Mips16 so we must handle things differently than how register scavenger is normally used. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174696 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-07Make sure we call externals from libraries properly when -static.Reed Kotler
For example, when we are doing mips16 hard float or soft float. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174583 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-07Enable jumps when in -static mode.Reed Kotler
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174580 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05[mips] Do not use function CC_MipsN_VarArg unless the function being analyzedAkira Hatanaka
is a vararg function. The original code was examining flag OutputArg::IsFixed to determine whether CC_MipsN_VarArg or CC_MipsN should be called. This is not correct, since this flag is often set to false when the function being analyzed is a non-variadic function. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174442 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05This patch that sets the EmitAlias flag in td files Jack Carter
and enables the instruction printer to print aliased instructions. Due to usage of RegisterOperands a change in common code (utils/TableGen/AsmWriterEmitter.cpp) is required to get the correct register value if it is a RegisterOperand. Contributer: Vladimir Medic git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174358 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-02Start static relocation implementation for mips16.Reed Kotler
This checkin makes hello world work. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174264 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-30[mips] Test case for r173862.Akira Hatanaka
Patch by Sasa Stankovic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173863 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-25[mips] Set flag neverHasSideEffects flag on some of the floating point ↵Akira Hatanaka
instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173401 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-24The next phase of Mips16 hard float implementation.Reed Kotler
Allow Mips16 routines to call Mips32 routines that have abi requirements that either arguments or return values are passed in floating point registers. This handles only the pic case. We have not done non pic for Mips16 yet in any form. The libm functions are Mips32, so with this addition we have a complete Mips16 hard float implementation. We still are not able to complete mix Mip16 and Mips32 with hard float. That will be the next phase which will have several steps. For Mips32 to freely call Mips16 some stub functions must be created. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173320 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-22[mips] Implement MipsRegisterInfo::getRegPressureLimit.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173197 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-04[mips] MipsTargetLowering::getSetCCResultType should return a vector type ifAkira Hatanaka
vectors are being compared. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171517 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-21Add test case for r170674Reed Kotler
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170823 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-20fix most of remaining issues with large frames.Reed Kotler
these patches are tested a lot by test-suite but make check tests are forthcoming once the next few patches that complete this are committed. with the next few patches the pass rate for mips16 is near 100% git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170656 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-20[mips] Use "or $r0, $r1, $zero" instead of "addu $r0, $zero, $r1" to copyAkira Hatanaka
physical register $r1 to $r0. GNU disassembler recognizes an "or" instruction as a "move", and this change makes the disassembled code easier to read. Original patch by Reed Kotler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170655 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-16This patch is needed to make c++ exceptions work for mips16.Reed Kotler
Mips16 is really a processor decoding mode (ala thumb 1) and in the same program, mips16 and mips32 functions can exist and can call each other. If a jal type instruction encounters an address with the lower bit set, then the processor switches to mips16 mode (if it is not already in it). If the lower bit is not set, then it switches to mips32 mode. The linker knows which functions are mips16 and which are mips32. When relocation is performed on code labels, this lower order bit is set if the code label is a mips16 code label. In general this works just fine, however when creating exception handling tables and dwarf, there are cases where you don't want this lower order bit added in. This has been traditionally distinguished in gas assembly source by using a different syntax for the label. lab1: ; this will cause the lower order bit to be added lab2=. ; this will not cause the lower order bit to be added In some cases, it does not matter because in dwarf and debug tables the difference of two labels is used and in that case the lower order bits subtract each other out. To fix this, I have added to mcstreamer the notion of a debuglabel. The default is for label and debug label to be the same. So calling EmitLabel and EmitDebugLabel produce the same result. For various reasons, there is only one set of labels that needs to be modified for the mips exceptions to work. These are the "$eh_func_beginXXX" labels. Mips overrides the debug label suffix from ":" to "=." . This initial patch fixes exceptions. More changes most likely will be needed to DwarfCFException to make all of this work for actual debugging. These changes will be to emit debug labels in some places where a simple label is emitted now. Some historical discussion on this from gcc can be found at: http://gcc.gnu.org/ml/gcc-patches/2008-08/msg00623.html http://gcc.gnu.org/ml/gcc-patches/2008-11/msg01273.html git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170279 91177308-0d34-0410-b5e6-96231b3b80d8
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