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2011-03-04Be nice to Xcore and the XMOS assembler and avoid quoting section namesJoerg Sonnenberger
that contain only letters, digits and the characters "_" and ".". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127028 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-04Allow vector shifts (shl,lshr,ashr) on SPU.Kalle Raiskila
There was a previous implementation with patterns that would have matched e.g. shl <v4i32> <i32>, but this is not valid LLVM IR so they never were selected. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126998 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-04Allow load from constant on SPU.Kalle Raiskila
A 'load <4 x i32>* null' crashes llc before this fix. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126995 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-03Bug#9033: For the ELF assembler output, always quote the section name.Joerg Sonnenberger
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126963 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-13fix visitShift to properly zero extend the shift amount if the provided operandChris Lattner
is narrower than the shift register. Doing an anyext provides undefined bits in the top part of the register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125457 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-20Allow sign-extending of i8 and i16 to i128 on SPU. Kalle Raiskila
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123912 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-17Don't crash SPU BE with memory accesses with big alignmnet.Kalle Raiskila
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123620 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-17Don't feed 19 bit immediates to ILA.Kalle Raiskila
Patch (slightly modified) by Visa Putkinen. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122052 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-06If dbg_declare() or dbg_value() is not lowered by isel then emit DEBUG ↵Devang Patel
message instead of creating DBG_VALUE for undefined value in reg0. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121059 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-29Handle lshr for i128 correctly on SPU also when Kalle Raiskila
shiftamount > 7. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120288 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-29Enable PostRA scheduling for SPU. Kalle Raiskila
This speeds up selected test cases with up to 5% - no slowdowns observed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120286 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-24Allow for 'fcmp ogt' in SPU.Kalle Raiskila
Fix by Visa Putkinen! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120090 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-23Division by pow-of-2 is not cheap on SPU, do it with Kalle Raiskila
shifts. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120022 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-22Fix a bug with extractelement on SPU.Kalle Raiskila
In the attached testcase, the element was never extracted (missing rotate). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119973 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-12Fix memory access lowering on SPU, addingKalle Raiskila
support for the case where alignment<value size. These cases were silently miscompiled before this patch. Now they are overly verbose -especially storing is- and any front-end should still avoid misaligned memory accesses as much as possible. The bit juggling algorithm added here probably has some room for improvement still. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118889 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26Change v64 datalayout in SPU.Kalle Raiskila
The SPU ABI does not mention v64, and all examples in C suggest v128 are treated similarily to arrays, we use array alignment for v64 too. This makes the alignment of e.g. [2 x <2 x i32>] behave "intuitively" and similar to as if the elements were e.g. i32s. This also makes an "unaligned store" test to be aligned, with different (but functionally equivalent) code generated. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117360 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-18Improve lowering of sext to i128 on SPU.Kalle Raiskila
The old algorithm inserted a 'rotqmbyi' instruction which was both redundant and wrong - it made shufb select bytes from the wrong end of the input quad. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116701 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-01Zap some redundant 'ori $?, $?, 0' from SPU.Kalle Raiskila
Also remove some code that died in the process. One now non-existant ori is checked for. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115306 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-16Change SPU register re-interpretations from OR to COPY_TO_REGCLASS instruction.Kalle Raiskila
This cleans up after the mess r108567 left in the CellSPU backend. ORCvt-instruction were used to reinterpret registers, and the ORs were then removed by isMoveInstr(). This patch now removes 350 instrucions of format: or $3, $3, $3 (from the 52 testcases in CodeGen/CellSPU). One case of a nonexistant or is checked for. Some moves of the form 'ori $., $., 0' and 'ai $., $., 0' still remain. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114074 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-08Fix CellSPU vector shuffles, again.Kalle Raiskila
Some cases of lowering to rotate were miscompiled. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113355 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-29Fix lowering of INSERT_VECTOR_ELT in SPU. Kalle Raiskila
The IDX was treated as byte index, not element index. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112422 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-24Fix SPU BE to use all the available return registers.Kalle Raiskila
llc used to assert on the added testcase. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111911 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-18Fix a bug with insertelement on SPU. Kalle Raiskila
The previous algorithm in LowerVECTOR_SHUFFLE didn't check all requirements for "monotonic" shuffles. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111361 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-18Remove all traces of v2[i,f]32 on SPU. Kalle Raiskila
The "half vectors" are now widened to full size by the legalizer. The only exception is in parameter passing, where half vectors are expanded. This causes changes to some dejagnu tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111360 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-18Change SPU C calling convention to match that described in Kalle Raiskila
"SPU Application Binary Interface Specification, v1.9" by IBM. Specifically: use r3-r74 to pass parameters and the return value. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111358 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-09Have SPU handle halfvec stores aligned by 8 bytes.Kalle Raiskila
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110576 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-04Make SPU backend handle insertelement and Kalle Raiskila
store for "half vectors" git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110198 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-02More SPU v2f32 stuff added: insertelement and shuffle.Kalle Raiskila
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110038 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-02Add preliminary v2f32 support for SPU. Like with v2i32, we justKalle Raiskila
duplicate the instructions and operate on half vectors. Also reorder code in SPUInstrInfo.td for better coherency. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110037 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-02Add preliminary v2i32 support for SPU backend. As there are noKalle Raiskila
such registers in SPU, this support boils down to "emulating" them by duplicating instructions on the general purpose registers. This adds the most basic operations on v2i32: passing parameters, addition, subtraction, multiplication and a few others. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110035 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-16Remove many calls to TII::isMoveInstr. Targets should be producing COPY anyway.Jakob Stoklund Olesen
TII::isMoveInstr is going tobe completely removed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108507 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-26Fix some tests that didn't test anything.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106954 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-21Add the check to the testcase of r106419.Kalle Raiskila
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106421 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-21Mark the SPU 'lr' instruction to never have side effects. Kalle Raiskila
This allows the fast regiser allocator to remove redundant register moves. Update a set of tests that depend on the register allocator to be linear scan. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106420 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-21Fix the lowering of VECTOR_SHUFFLE on SPU to handle splats.Kalle Raiskila
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106419 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-21Fix lowering of VECTOR_SHUFFLE on SPU. Old algorithmKalle Raiskila
used to choke llc with the attached test. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106411 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-09Fix SPU to cope with vector insertelement to an undef position.Kalle Raiskila
We default to inserting to lane 0. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105722 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-09Handle loading from/storing to undef pointers on SPU by inserting a Kalle Raiskila
random load/store, rather than crashing llc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105710 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-01Fix handling of 'load' nodes.Kalle Raiskila
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105269 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-11Make SPU backend not assert on jump tables.Kalle Raiskila
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103466 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-10Fix encoding of 'sf' and 'sfh' instructions.Kalle Raiskila
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103399 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-04"on the rare occasion the SPU BE produces illegal assembly - it tries to ↵Chris Lattner
emit an add instruction of the form 'a reg, reg, imm'." Patch by Kalle Raiskila! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103021 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-20teach cellspu how to return i8 and i16 from calls,Chris Lattner
patch by Kalle Raiskila! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101875 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-09Make sure this test tests something.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100879 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-09"On SPU, variables in the .bss section that are allocated with the .lcomm ↵Chris Lattner
directive are not aligned on 16 byte boundaries. This causes misaligned loads, as the generated assembly assumes this "default" alignment. this patch disables .lcomm in favour of '.local .comm' Patch by Kalle Raisklia! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100875 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-07Split big test into multiple directories to cater toDale Johannesen
those who don't build all targets. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100688 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-29From Kalle Raiskila:Chris Lattner
"the bigstack patch for SPU, with testcase. It is essentially the patch committed as 97091, and reverted as 97099, but with the following additions: -in vararg handling, registers are marked to be live, to not confuse the register scavenger -function prologue and epilogue are not emitted, if the stack size is 16. 16 means it is empty - there is only the register scavenger emergency spill slot, which is not used as there is no stack." git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99819 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-05fix bss section printing for cell, patch by Kalle Raiskila!Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97814 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-19don't let asm-verbose break the check-next lines in these tests.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93869 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-06Teach dag combine to fold the following transformation more aggressively:Evan Cheng
(OP (trunc x), (trunc y)) -> (trunc (OP x, y)) Unfortunately this simple change causes dag combine to infinite looping. The problem is the shrink demanded ops optimization tend to canonicalize expressions in the opposite manner. That is badness. This patch disable those optimizations in dag combine but instead it is done as a late pass in sdisel. This also exposes some deficiencies in dag combine and x86 setcc / brcond lowering. Teach them to look pass ISD::TRUNCATE in various places. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92849 91177308-0d34-0410-b5e6-96231b3b80d8
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