aboutsummaryrefslogtreecommitdiff
path: root/test/CodeGen/CellSPU
AgeCommit message (Collapse)Author
2008-04-28Update and_ops.ll according to the recent dagcombiner changes.Dan Gohman
Add a new test, and_ops_more.ll, which is XFAIL'd, to record the parts of and_ops.ll that were affected by this change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50379 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-14Upgrade these tests for the current intrinsic prototypes.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49669 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-20Add more patterns to match in the integer comparison test harnesses.Scott Michel
Fix bugs encountered, mostly due to range matching for immediates; the CellSPU's 10-bit immediates are sign extended, covering a larger range of unsigned values. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48575 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10- Style cleanup in IA64ISelLowering.h: add 'virtual' keyword for consistency.Scott Michel
- Add test pattern matching in CellSPU's icmp32.ll test harness - Fix CellSPU fcmp.ll-generated assert. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48197 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10Integer comparison tests for CellSPU.Scott Michel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48152 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-06Refine Cell's i64 constant generation code to cover more constants where theScott Michel
upper and lower 32-bits are the same (in addition to 0 and -1 previously.) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47985 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-05- Expand tabs to spaces.Scott Michel
- select_bits.ll now fully functional now that PR1993 is closed. It was previously broken by refactoring in SPUInstrInfo.td and using multiclasses. - Same for eqv.ll git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47972 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-23Merge current work back to tree to minimize diffs and drift. Major highlightsScott Michel
for CellSPU modifications: - SPUInstrInfo.td refactoring: "multiclass" really is _your_ friend. - Other improvements based on refactoring effort in SPUISelLowering.cpp, esp. in SPUISelLowering::PerformDAGCombine(), where zero amount shifts and rotates are now eliminiated, other scalar-to-vector-to-scalar silliness is also eliminated. - 64-bit operations are being implemented, _muldi3.c gcc runtime now compiles and generates the right code. More work still needs to be done. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47532 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-29Overhaul Cell SPU's addressing mode internals so that there are nowScott Michel
only two addressing mode nodes, SPUaform and SPUindirect (vice the three previous ones, SPUaform, SPUdform and SPUxform). This improves code somewhat because we now avoid using reg+reg addressing when it can be avoided. It also simplifies the address selection logic, which was the main point for doing this. Also, for various global variables that would be loaded using SPU's A-form addressing, prefer D-form offs[reg] addressing, keeping the base in a register if the variable is used more than once. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46483 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-18remove extraneous &&'s from tests, as Scott is apparently not going to.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46173 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-17Forward progress: crtbegin.c now compiles successfully!Scott Michel
Fixed CellSPU's A-form (local store) address mode, so that all globals, externals, constant pool and jump table symbols are now wrapped within a SPUISD::AFormAddr pseudo-instruction. This now identifies all local store memory addresses, although it requires a bit of legerdemain during instruction selection to properly select loads to and stores from local store, properly generating "LQA" instructions. Also added mul_ops.ll test harness for exercising integer multiplication. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46142 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-11More CellSPU refinements:Scott Michel
- struct_2.ll: Completely unaligned load/store testing - call_indirect.ll, struct_1.ll: Add test lines to exercise X-form [$reg($reg)] addressing At this point, loads and stores should be under control (he says in an optimistic tone of voice.) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45882 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-11More CellSPU refinement and progress:Scott Michel
- Cleaned up custom load/store logic, common code is now shared [see note below], cleaned up address modes - More test cases: various intrinsics, structure element access (load/store test), updated target data strings, indirect function calls. Note: This patch contains a refactoring of the LoadSDNode and StoreSDNode structures: they now share a common base class, LSBaseSDNode, that provides an interface to their common functionality. There is some hackery to access the proper operand depending on the derived class; otherwise, to do a proper job would require finding and rearranging the SDOperands sent to StoreSDNode's constructor. The current refactor errs on the side of being conservatively and backwardly compatible while providing functionality that reduces redundant code for targets where loads and stores are custom-lowered. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45851 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-20More working CellSPU tests:Scott Michel
- vec_const.ll: Vector constant loads - immed64.ll: i64, f64 constant loads git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45242 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-19CellSPU testcase, extract_elt.ll: extract vector element.Scott Michel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45219 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-19More working CellSPU test cases:Scott Michel
- call.ll: Function call - ctpop.ll: Count population - dp_farith.ll: DP arithmetic - eqv.ll: Equivalence primitives - fcmp.ll: SP comparisons - fdiv.ll: SP division - fneg-fabs.ll: SP negation, aboslute value - int2fp.ll: Integer -> SP conversion - rotate_ops.ll: Rotation primitives - select_bits.ll: (a & c) | (b & ~c) bit selection - shift_ops.ll: Shift primitives - sp_farith.ll: SP arithmentic git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45217 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-19Two more test cases: or_ops.ll (arithmetic or operations) and vecinsert.llScott Michel
(vector insertions) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45216 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-19Add new immed16.ll test case, fix CellSPU errata to make test case work.Scott Michel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45196 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-17i32 immediate constant test case for CellSPUScott Michel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45134 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-17- Restore some i8 functionality in CellSPUScott Michel
- New test case: nand.ll git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45130 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-15Start committing working test cases for CellSPU.Scott Michel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45050 91177308-0d34-0410-b5e6-96231b3b80d8
generated by cgit v1.2.3-70-g09d2 (git 2.46.0) at 2025-12-27 18:28:17 +0000