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2012-07-06Revert r159804, "[arm-fast-isel] Add support for vararg function calls."NAKAMURA Takumi
It broke LLVM :: CodeGen/Thumb2/large-call.ll on several hosts. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159817 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-06[arm-fast-isel] Add support for vararg function calls.Jush Lu
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159804 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-02Fix the remaining TCL-style quotes found in the testsuite. This isChandler Carruth
another mechanical change accomplished though the power of terrible Perl scripts. I have manually switched some "s to 's to make escaping simpler. While I started this to fix tests that aren't run in all configurations, the massive number of tests is due to a really frustrating fragility of our testing infrastructure: things like 'grep -v', 'not grep', and 'expected failures' can mask broken tests all too easily. Essentially, I'm deeply disturbed that I can change the testsuite so radically without causing any change in results for most platforms. =/ git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159547 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-02Convert the uses of '|&' to use '2>&1 |' instead, which works on oldChandler Carruth
versions of Bash. In addition, I can back out the change to the lit built-in shell test runner to support this. This should fix the majority of fallout on Darwin, but I suspect there will be a few straggling issues. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159544 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-02Convert all tests using TCL-style quoting to use shell-style quoting.Chandler Carruth
This was done through the aid of a terrible Perl creation. I will not paste any of the horrors here. Suffice to say, it require multiple staged rounds of replacements, state carried between, and a few nested-construct-parsing hacks that I'm not proud of. It happens, by luck, to be able to deal with all the TCL-quoting patterns in evidence in the LLVM test suite. If anyone is maintaining large out-of-tree test trees, feel free to poke me and I'll send you the steps I used to convert things, as well as answer any painful questions etc. IRC works best for this type of thing I find. Once converted, switch the LLVM lit config to use ShTests the same as Clang. In addition to being able to delete large amounts of Python code from 'lit', this will also simplify the entire test suite and some of lit's architecture. Finally, the test suite runs 33% faster on Linux now. ;] For my 16-hardware-thread (2x 4-core xeon e5520): 36s -> 24s git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159525 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-01Now that RegistersDefinedFromSameValue handles one instruction being anRafael Espindola
implicit_def, the other instruction can be anything, including instructions that define multiple values. Be careful about that and don't assume what operand 0 is. Fixes pr13249. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159509 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-25ARM: update peephole optimization.Manman Ren
More condition codes are included when deciding whether to remove cmp after a sub instruction. Specifically, we extend from GE|LT|GT|LE to GE|LT|GT|LE|HS|LS|HI|LO|EQ|NE. If we have "sub a, b; cmp b, a; movhs", we should be able to replace with "sub a, b; movls". rdar: 11725965 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159166 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-24DAG legalisation can now handle illegal fma vector types by scalarisationPete Cooper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159092 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-23Extend the IL for selecting TLS models (PR9788)Hans Wennborg
This allows the user/front-end to specify a model that is better than what LLVM would choose by default. For example, a variable might be declared as @x = thread_local(initialexec) global i32 42 if it will not be used in a shared library that is dlopen'ed. If the specified model isn't supported by the target, or if LLVM can make a better choice, a different model may be used. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159077 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-23(sub X, imm) gets canonicalized to (add X, -imm)Evan Cheng
There are patterns to handle immediates when they fit in the immediate field. e.g. %sub = add i32 %x, -123 => sub r0, r0, #123 Add patterns to catch immediates that do not fit but should be materialized with a single movw instruction rather than movw + movt pair. e.g. %sub = add i32 %x, -65535 => movw r1, #65535 sub r0, r0, r1 rdar://11726136 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159057 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-22Rename fp-op fusion option (yet again) for compatibility with GCC option.Lang Hames
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159042 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-22ARM scheduling fix: compute predicated implicit use properly.Andrew Trick
Minor drive by fix to cleanup latency computation. Calling getOperandLatency with a deliberately incorrect operand index does not give you the latency you want. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158959 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-22Rename -allow-excess-fp-precision flag to -fuse-fp-ops, and switch from aLang Hames
boolean flag to an enum: { Fast, Standard, Strict } (default = Standard). This option controls the creation by optimizations of fused FP ops that store intermediate results in higher precision than IEEE allows (E.g. FMAs). The behavior of this option is intended to match the behaviour specified by a soon-to-be-introduced frontend flag: '-ffuse-fp-ops'. Fast mode - allows formation of fused FP ops whenever they're profitable. Standard mode - allow fusion only for 'blessed' FP ops. At present the only blessed op is the fmuladd intrinsic. In the future more blessed ops may be added. Strict mode - allow fusion only if/when it can be proven that the excess precision won't effect the result. Note: This option only controls formation of fused ops by the optimizers. Fused operations that are explicitly requested (e.g. FMA via the llvm.fma.* intrinsic) will always be honored, regardless of the value of this option. Internally TargetOptions::AllowExcessFPPrecision has been replaced by TargetOptions::AllowFPOpFusion. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158956 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-21Add a missing llvm.fma -> VFNMS pattern to the ARM backend.Lang Hames
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158902 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-21Emit a single _udivmodsi4 libcall instead of two separate _udivsi3 andEvan Cheng
_umodsi3 libcalls if they have the same arguments. This optimization was apparently broken if one of the node was replaced in place. rdar://11714607 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158900 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-19Add DAG-combines for aggressive FMA formation.Lang Hames
This patch adds DAG combines to form FMAs from pairs of FADD + FMUL or FSUB + FMUL. The combines are performed when: (a) Either AllowExcessFPPrecision option (-enable-excess-fp-precision for llc) OR UnsafeFPMath option (-enable-unsafe-fp-math) are set, and (b) TargetLoweringInfo::isFMAFasterThanMulAndAdd(VT) is true for the type of the FADD/FSUB, and (c) The FMUL only has one user (the FADD/FSUB). If your target has fast FMA instructions you can make use of these combines by overriding TargetLoweringInfo::isFMAFasterThanMulAndAdd(VT) to return true for types supported by your FMA instruction, and adding patterns to match ISD::FMA to your FMA instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158757 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-18ARM: use NOEN loads and stores if possible when handling struct byval.Manman Ren
This change is to be enabled in clang. rdar://9877866 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158684 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-18This change handles a another case for generating the bic instruction Joel Jones
when a compile time constant is known. This occurs when implicitly zero extending function arguments from 16 bits to 32 bits. The 8 bit case doesn't need to be handled, as the 8 bit constants are encoded directly, thereby not needing a separate load instruction to form the constant into a register. <rdar://problem/11481151> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158659 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-15ARM: optimization for sub+abs.Manman Ren
This patch will optimize abs(x-y) FROM sub, movs, rsbmi TO subs, rsbmi For abs, we will use cmp instead of movs. This is necessary because we already have an existing peephole pass which optimizes away cmp following sub. rdar: 11633193 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158551 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-15Preserve <undef> flags in ARMExpandPseudo.Jakob Stoklund Olesen
This probably mostly shows up in bugpoint-generated code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158527 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-14Revert: test/CodeGen/ARM/iabs.ll in r158441Manman Ren
Sorry that I accidently checked in this file with my previous commit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158442 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-14InstCombine: fix a bug when combining (fcmp cc0 x, y) && (fcmp cc1 x, y).Manman Ren
uno && ueq was converted to ueq, it should be converted to uno. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158441 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-13sched: fix latency of memory dependence chain edges for consistency.Andrew Trick
For store->load dependencies that may alias, we should always use TrueMemOrderLatency, which may eventually become a subtarget hook. In effect, we should guarantee at least TrueMemOrderLatency on at least one DAG path from a store to a may-alias load. This should fix the standard mode as well as -enable-aa-sched-mi". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158380 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-12[arm-fast-isel] Add support for -arm-long-calls.Chad Rosier
Patch by Jush Lu <jush.msn@gmail.com>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158368 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-11Fix test that depends on register allocation.Jakob Stoklund Olesen
The test is really checking the prolog/epilog load/store multiple formation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158328 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-11Re-enable the CMN instruction.Bill Wendling
We turned off the CMN instruction because it had semantics which we weren't getting correct. If we are comparing with an immediate, then it's okay to use the CMN instruction. <rdar://problem/7569620> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158302 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-08Don't run RAFast in the optimizing regalloc pipeline.Jakob Stoklund Olesen
The fast register allocator is not supposed to work in the optimizing pipeline. It doesn't make sense to compute live intervals, run full copy coalescing, and then run RAFast. Fast register allocation in the optimizing pipeline is better done by RABasic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158242 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-05Revert commit r157966Joel Jones
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157972 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-04This change handles a another case for generating the bic instruction Joel Jones
when a compile time constant is known. This occurs when implicitly zero extending function arguments from 16 bits to 32 bits. <rdar://problem/11481151> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157966 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-04Remove the "-promote-elements" flag. This flag is now enabled by default.Nadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157925 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-02ARM: add testing case for struct byvalManman Ren
rdar://9877866 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157876 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-31Make this testcase independent of register allocation.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157761 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-30Switch the canonical FMA term operand order to match both the comment I ↵Owen Anderson
wrote and the usual LLVM convention. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157708 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-30Teach DAGCombine to canonicalize the position of a constant in the term ↵Owen Anderson
operands of an FMA node. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157707 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-30[arm-fast-isel] Add support for the llvm.frameaddress() intrinsic.Chad Rosier
Patch by Jush Lu <jush.msn@gmail.com>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157696 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-30Teach taildup to update livein set. rdar://11538365Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157663 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-27These tests used intrinsics with the wrong prototype. They weren't caught ↵Chris Lattner
because the old verifier just checked that something "was a pointer", but not that the pointee was correct. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157544 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-23[arm-fast-isel] Add support for non-global callee.Chad Rosier
Patch by Jush Lu <jush.msn@gmail.com>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157336 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-22revert my previous patches that introduced an additional parameter to the ↵Nuno Lopes
objectsize intrinsic. After a lot of discussion, we realized it's not the best option for run-time bounds checking git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157255 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-20Transfer memory operands to the right instruction.Jakob Stoklund Olesen
They need to go on the PICLDR as the verifier points out. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157151 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-18Refactor data-in-code annotations.Jim Grosbach
Use a dedicated MachO load command to annotate data-in-code regions. This is the same format the linker produces for final executable images, allowing consistency of representation and use of introspection tools for both object and executable files. Data-in-code regions are annotated via ".data_region"/".end_data_region" directive pairs, with an optional region type. data_region_directive := ".data_region" { region_type } region_type := "jt8" | "jt16" | "jt32" | "jta32" end_data_region_directive := ".end_data_region" The previous handling of ARM-style "$d.*" labels was broken and has been removed. Specifically, it didn't handle ARM vs. Thumb mode when marking the end of the section. rdar://11459456 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157062 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-17Remove incorrect pattern for ARM SMML instruction.Tim Northover
Patch by Meador Inge. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156989 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-15Enable sub-sub-register copy coalescing.Jakob Stoklund Olesen
It is now possible to coalesce weird skewed sub-register copies by picking a super-register class larger than both original registers. The included test case produces code like this: vld2.32 {d16, d17, d18, d19}, [r0]! vst2.32 {d18, d19, d20, d21}, [r0] We still perform interference checking as if it were a normal full copy join, so this is still quite conservative. In particular, the f1 and f2 functions in the included test case still have remaining copies because of false interference. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156878 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-11[fast-isel] Add support for selecting @llvm.trap().Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156646 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-11[fast-isel] Remove -disable-arm-fast-isel option. -fast-isel=0 suffices. ↵Chad Rosier
Minor cleanup. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156632 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-11[fast-isel] Cleaner fix for when we're unable to handle a non-double multi-regChad Rosier
retval. Hoists check before emitting the call to avoid unnecessary work. rdar://11430407 PR12796 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156628 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-11ARM: peephole optimization to remove cmp instructionManman Ren
This patch will optimize the following cases: sub r1, r3 | sub r1, imm cmp r3, r1 or cmp r1, r3 | cmp r1, imm bge L1 TO subs r1, r3 bge L1 or ble L1 If the branch instruction can use flag from "sub", then we can replace "sub" with "subs" and eliminate the "cmp" instruction. rdar: 10734411 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156599 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-10Revert: 156550 "ARM: peephole optimization to remove cmp instruction"Manman Ren
This commit broke an external linux bot and gave a compile-time warning. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156556 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-10ARM: peephole optimization to remove cmp instructionManman Ren
This patch will optimize the following cases: sub r1, r3 | sub r1, imm cmp r3, r1 or cmp r1, r3 | cmp r1, imm bge L1 TO subs r1, r3 bge L1 or ble L1 If the branch instruction can use flag from "sub", then we can replace "sub" with "subs" and eliminate the "cmp" instruction. rdar: 10734411 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156550 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-09change the objectsize intrinsic signature: add a 3rd parameter to denote the ↵Nuno Lopes
maximum runtime performance penalty that the user is willing to accept. This commit only adds the parameter. Code taking advantage of it will follow. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156473 91177308-0d34-0410-b5e6-96231b3b80d8
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