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2010-01-22Revert LoopStrengthReduce.cpp to pre-r94061 for now.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94123 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-21Re-implement the main strength-reduction portion of LoopStrengthReduction.Dan Gohman
This new version is much more aggressive about doing "full" reduction in cases where it reduces register pressure, and also more aggressive about rewriting induction variables to count down (or up) to zero when doing so reduces register pressure. It currently uses fairly simplistic algorithms for finding reuse opportunities, but it introduces a new framework allows it to combine multiple strategies at once to form hybrid solutions, instead of doing all full-reduction or all base+index. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94061 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-19Test case for r93758.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93824 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-17The Neon "vtst" instruction takes a suffix that is the element size alone --Bob Wilson
adding an "i" to the suffix, indicating that the elements are integers, is accepted but not part of the standard syntax. This helps us pass a few more of the Neon tests from gcc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93677 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-16Run the pre-register allocation tail duplication pass by default. RemoveBob Wilson
the -pre-regalloc-taildup command-line option, and add a new -disable-early-taildup option. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93597 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-13remove uses of deprecated functions, this generates slightlyChris Lattner
different BlockAddress labels, but nothing semantically important. Add a FIXME that BlockAddress codegen is broken if the LLVM BB has an empty name (e.g. strip was run). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93303 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-05Delete useless trailing semicolons.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92740 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-01Make this more likely to generate a libcall.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92387 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-18Handle ARM inline asm "w" constraints with 64-bit ("d") registers.Bob Wilson
The change in SelectionDAGBuilder is needed to allow using bitcasts to convert between f64 (the default type for ARM "d" registers) and 64-bit Neon vector types. Radar 7457110. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91649 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-08- Support inline asm 'w' constraint for 128-bit vector types.Evan Cheng
- Also support the 'q' NEON registers asm code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90894 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-03Recognize canonical forms of vector shuffles where the same vector is used forBob Wilson
both source operands. In the canonical form, the 2nd operand is changed to an undef and the shuffle mask is adjusted to only reference elements from the 1st operand. Radar 7434842. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90417 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-01Fix PR5614: parts of a physical register def may be killed the rest.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90180 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-24Materialize global addresses via movt/movw pair, this is always betterAnton Korobeynikov
than doing the same via constpool: 1. Load from constpool costs 3 cycles on A9, movt/movw pair - just 2. 2. Load from constpool might stall up to 300 cycles due to cache miss. 3. Movt/movw does not use load/store unit. 4. Less constpool entries => better compiler performance. This is only enabled on ELF systems, since darwin does not have needed relocations (yet). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89720 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-23move fconst[sd] to UAL. <rdar://7414913>Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89700 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-22Convert ARM tests to FileCheck for PR5307.Edward O'Callaghan
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89593 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-22Forgot to alter RUN line when converting to FileCheck.Edward O'Callaghan
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89588 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-22Fix for bad FileCheck converts in revision 89584.Edward O'Callaghan
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89586 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-22Convert a few tests to FileCheck for PR5307.Edward O'Callaghan
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89584 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-21Revert 89562. We're being sneakier than I was giving us credit for, and thisJim Grosbach
isn't necessary. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89568 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-21Darwin requires a frame pointer for all non-leaf functions to support correctJim Grosbach
backtraces. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89562 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20Remat VLDRD from constpool. Clean up some instruction property specifications.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89478 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20Fix codegen of conditional move of immediates. We were not making use of the ↵Evan Cheng
immediate forms of cmov instructions at all. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89423 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-18Fix buildbots.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89274 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-18Tail duplication still needs to iterate. Duplicating new instructions ontoBob Wilson
the tail of a block may make that block a new candidate for duplication. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89264 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-17Forgot to commit test fixesAnton Korobeynikov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89138 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-15Detect need for autoalignment of the stack earlier to catch spills moreJim Grosbach
conservatively. eliminateFrameIndex() machinery adjust to handle addr mode 6 (vld1/vst1) used for spills. Fix tests to expect aligned Q-reg spilling git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88874 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-14- Change TargetInstrInfo::reMaterialize to pass in TargetRegisterInfo.Evan Cheng
- If destination is a physical register and it has a subreg index, use the sub-register instead. This fixes PR5423. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88745 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-14Add radar number.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88739 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-14Fix PR5412: Fix an inverted check and another missing sub-register check.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88738 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-13Fix PR5411. Bug in UpdateKills. A reg def partially define its super-registers.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88719 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-13Fix PR5410: LiveVariables lost subreg def:Evan Cheng
D0<def,dead> = ... ... = S0<use, kill> S0<def> = ... ... D0<def> = The first D0 def is correctly marked dead, however, livevariables should have added an implicit def of S0 or we end up with a use without a def. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88690 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-09Use Unified Assembly Syntax for the ARM backend.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86494 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07It turns out that the testcase in question uncovered subreg-handling bug.Anton Korobeynikov
Add assert in asmprinter to catch such cases and xfail the tests. PR is to be filled. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86375 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-06Honour subreg machine operands during asmprintingAnton Korobeynikov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86303 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-06Print VMOV (immediate) operands as hexadecimal values. Apple's assemblerBob Wilson
will not accept negative values for these. LLVM's default operand printing sign extends values, so that valid unsigned values appear as negative immediates. Print all VMOV immediate operands as hex values to resolve this. Radar 7372576. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86301 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-06Remove ARMPCLabelIndex from ARMISelLowering. Use ↵Evan Cheng
ARMFunctionInfo::createConstPoolEntryUId() instead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86294 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-05Update these tests for the new label names.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86192 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-05Attempt again to fix buildbot failures: make expected output less specificBob Wilson
and compile with -mtriple to specify *-apple-darwin targets. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86081 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-04Fix broken test.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86045 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-04Add test for ARM indirectbr codegen.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86042 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-03fconsts / fconstd immediate should be proceeded with #.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85952 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-03Re-apply 85799. It turns out my code isn't buggy.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85947 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-03Fix PR5367. QPR_8 is the super regclass of DPR_8 and SPR_8.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85871 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-03Revert r85049, it is causing PR5367Anton Korobeynikov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85847 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-02Revert 85799 for now. It might be breaking llvm-gcc driver.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85827 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-02Initilize the machine LICM CSE map upon the first time an instruction is ↵Evan Cheng
hoisted to the loop preheader. Add instructions which are already in the preheader block that may be common expressions of those that are hoisted out. These does get a few more instructions CSE'ed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85799 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-02Remove an irrelevant and poorly reduced test case.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85794 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-02Handle splats of undefs properly. This includes the testcase for PR5364 as well.Anton Korobeynikov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85767 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-0264-bit FP loads & stores operate on both NEON and VFP pipelines.Anton Korobeynikov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85765 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-31vml[as].f32 cause stalls in following advanced SIMD instructions. Avoid usingJim Grosbach
them for scalar floating point operations for now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85697 91177308-0d34-0410-b5e6-96231b3b80d8
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