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2013-02-12[asan] change the default mapping offset on x86_64 to 0x7fff8000. This gives ↵Kostya Serebryany
roughly 5% speedup. Since this is an ABI change, bump the asan ABI version by renaming __asan_init to __asan_init_v1. llvm part, compiler-rt part will follow git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174957 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12Merge the collected attributes into the call instruction's attributes.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174955 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12Have the bitcode writer and reader handle the new attribute references.Bill Wendling
The bitcode writer emits a reference to the attribute group that the object at the given index refers to. The bitcode reader is modified to read this in and map it back to the attribute group. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174952 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12Use the AttributeSet as the 'key' to the map instead of the 'raw' pointer.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174950 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12Support string attributes in the AttrBuilder.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174948 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12Don't consider definitions by other PHIs live-in when trimming a PHI source'sCameron Zwarich
live range after inserting a copy at the end of a block. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174945 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12Fix indentation.Cameron Zwarich
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174944 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12Add a hidden option to PHIElimination to split all critical edges. This isCameron Zwarich
particularly useful for catching issues with architectures that have exotic terminators like MIPS. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174938 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12Add blocks to the LiveIntervalAnalysis RegMaskBlocks array when splittingCameron Zwarich
a critical edge. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174936 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12Fix the updating of LiveIntervals after splitting a critical edge. PHI operandCameron Zwarich
live ranges should always be extended, and the only successor that should be considered for extension of other ranges is the target of the split edge. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174935 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12Check type for legality before forming a select from loads.Pete Cooper
Sorry for the lack of a test case. I tried writing one for i386 as i know selects are illegal on this target, but they are actually considered legal by isel and expanded later. I can't see any targets to trigger this, but checking for the legality of a node before forming it is general goodness. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174934 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12ARM cost model: Add vector reverse shuffle costsArnold Schwaighofer
A reverse shuffle is lowered to a vrev and possibly a vext instruction (quad word). radar://13171406 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174933 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12Cost model: Add check for reverse shuffles to CostModel analysisArnold Schwaighofer
Check for reverse shuffles in the CostModel analysis pass and query TargetTransform info accordingly. This allows us we can write test cases for reverse shuffles. radar://13171406 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174932 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12ARM NEON: Handle v16i8 and v8i16 reverse shufflesArnold Schwaighofer
Lower reverse shuffles to a vrev64 and a vext instruction instead of the default legalization of storing and loading to the stack. This is important because we generate reverse shuffles in the loop vectorizer when we reverse store to an array. uint8_t Arr[N]; for (i = 0; i < N; ++i) Arr[N - i - 1] = ... radar://13171760 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174929 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12Update error message due to previous commit, r174926.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174927 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12[ms-inline asm] Add support for lexing hexidecimal integers with a [hH] suffix.Chad Rosier
Part of rdar://12470373 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174926 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12DIBuilder: make the return type of createBasicType more specificDavid Blaikie
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174924 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12Added 0x0D to 2-byte opcode extension table for prefetch* variantsKay Tiong Khoo
Fixed decode of existing 3dNow prefetchw instruction Intel is scheduled to add a compatible prefetchw (same encoding) to future CPUs git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174920 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11BBVectorize: Don't over-search when building the dependency mapHal Finkel
When building the pairable-instruction dependency map, don't search past the last pairable instruction. For large blocks that have been divided into multiple instruction groups, searching past the last instruction in each group is very wasteful. This gives a 32% speedup on the csa.ll test case from PR15222 (when using 50 instructions in each group). No functionality change intended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174915 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11BBVectorize: Omit unnecessary entries in PairableInstUsersHal Finkel
This map is queried only for instructions in pairs of pairable instructions; so make sure that only pairs of pairable instructions are added to the map. This gives a 3.5% speedup on the csa.ll test case from PR15222. No functionality change intended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174914 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11[mips] Expand pseudo instructions before they are emitted inAkira Hatanaka
MipsCodeEmitter.cpp. JALR and NOP are expanded by function emitPseudoExpansionLowering, which is not called when the old JIT is used. This fixes the following tests which have been failing on llvm-mips-linux builder: LLVM :: ExecutionEngine__2003-01-04-LoopTest.ll LLVM :: ExecutionEngine__2003-05-06-LivenessClobber.ll LLVM :: ExecutionEngine__2003-06-04-bzip2-bug.ll LLVM :: ExecutionEngine__2005-12-02-TailCallBug.ll LLVM :: ExecutionEngine__2003-10-18-PHINode-ConstantExpr-CondCode-Failure.ll LLVM :: ExecutionEngine__hello2.ll LLVM :: ExecutionEngine__stubs.ll LLVM :: ExecutionEngine__test-branch.ll LLVM :: ExecutionEngine__test-call.ll LLVM :: ExecutionEngine__test-common-symbols.ll LLVM :: ExecutionEngine__test-loadstore.ll LLVM :: ExecutionEngine__test-loop.ll git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174912 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11Rename AttributeSets to AttributeGroups so that it's more meaningful.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174911 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11Use a std::map so that we record the group ID.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174910 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11[mips] Fix indentation.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174907 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11Optimization: bitcast (<1 x ...> insertelement ..., X, ...) to ... ==> ↵Michael Ilseman
bitcast X to ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174905 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11Extend Hexagon hardware loop generation to handle various additional cases:Krzysztof Parzyszek
- variety of compare instructions, - loops with no preheader, - arbitrary lower and upper bounds. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174904 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11Implement HexagonInstrInfo::analyzeCompare.Krzysztof Parzyszek
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174901 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11*fixed disassembly of some i386 system insts with intel syntaxKay Tiong Khoo
*added file for test cases for i386 intel syntax git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174900 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11BBVectorize: Eliminate one more restricted linear searchHal Finkel
This eliminates one more linear search over a range of std::multimap entries. This gives a 22% speedup on the csa.ll test case from PR15222. No functionality change intended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174893 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11R600/SI: Use V_ADD_F32 instead of V_MOV_B32 for clamp/neg/abs modifiers.Michel Danzer
The modifiers don't seem to have any effect with V_MOV_B32, supposedly it's meant to just move bits untouched. Fixes 46 piglit tests with radeonsi, though unfortunately 11 of those had just regressed because they started using the clamp modifier. NOTE: This is a candidate for the Mesa stable branch. Reviewed-by: Tom Stellard <thomas.stellard@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174890 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11[asan] added a flag -mllvm asan-short-64bit-mapping-offset=1 (0 by default)Kostya Serebryany
This flag makes asan use a small (<2G) offset for 64-bit asan shadow mapping. On x86_64 this saves us a register, thus achieving ~2/3 of the zero-base-offset's benefits in both performance and code size. Thanks Jakub Jelinek for the idea. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174886 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11AArch64: fix build on some MSVC versionsTim Northover
This does two things: It removes a call to abs() which may have "long long" parameter on Windows, which is not necessarily available in C++03. It also corrects the signedness of Amount, which was relying on implementation-defined conversions previously. Code was already tested (albeit in an implemnetation defined way) so no extra tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174885 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11AArch64: Simplify logic in deciding whether bfi is validTim Northover
Previous code had a confusing comment which was mostly an implementation detail. This condition corresponds to "lsb up to register width" and "width not ridiculous". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174877 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11Make use of DiagnosticType to provide better AArch64 diagnostics.Tim Northover
This gives a DiagnosticType to all AsmOperands in sight. This replaces all "invalid operand" diagnostics with something more specific. The messages given should still be sufficiently vague that they're not usually actively misleading when LLVM guesses your instruction incorrectly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174871 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11Add support for updating LiveIntervals to ↵Cameron Zwarich
MachineBasicBlock::SplitCriticalEdge(). This is currently a bit hairier than it needs to be, since depending on where the split block resides the end ListEntry of the split block may be the end ListEntry of the original block or a new entry. Some changes to the SlotIndexes updating should make it possible to eliminate the two cases here. This also isn't as optimized as it could be. In the future Liveinterval should probably get a flag that indicates whether the LiveInterval is within a single basic block. We could ignore all such intervals when splitting an edge. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174870 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11Update SlotIndexes after updateTerminator() possibly removes instructions. I amCameron Zwarich
really trying to avoid piping SlotIndexes through to RemoveBranch() and friends. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174869 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11Add support for printing out the attribute groups.Bill Wendling
This emits the attribute groups that are used by the functions. (It currently doesn't print out return type or parameter attributes within attribute groups.) Note: The functions still retrieve their attributes from the "old" bitcode format (using the deprecated 'Raw()' method). This means that string attributes within an attribute group will not show up during a disassembly. This will be addressed in a future commit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174867 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11[tsan/msan] adding thread_safety and uninitialized_checks attributesKostya Serebryany
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174864 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11Revert "Rename LLVMContext diagnostic handler types and functions."Bob Wilson
This reverts my commit 171047. Now that I've removed my misguided attempt to support backend warnings, these diagnostics are only about inline assembly. It would take quite a bit more work to generalize them properly, so I'm just reverting this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174860 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11BBVectorize: Remove the linear searches from pair connection searchingHal Finkel
This removes the last of the linear searches over ranges of std::multimap iterators, giving a 7% speedup on the doduc.bc input from PR15222. No functionality change intended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174859 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11BBVectorize: Avoid linear searches within the load-move setHal Finkel
This is another cleanup aimed at eliminating linear searches in ranges of std::multimap. No functionality change intended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174858 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11BBVectorize: isa/cast cleanup in getInstructionTypesHal Finkel
Profiling suggests that getInstructionTypes is performance-sensitive, this cleans up some double-casting in that function in favor of using dyn_cast. No functionality change intended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174857 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11BBVectorize: Make the bookkeeping to support full cycle checking less expensiveHal Finkel
By itself, this does not have much of an effect, but only because in the default configuration the full cycle checks are used only for small problem sizes. This is part of a general cleanup of uses of iteration over std::multimap ranges only for the purpose of checking membership. No functionality change intended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174856 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11Currently, codegen may spent some time in SDISel passes even if an entireEvan Cheng
function is successfully handled by fast-isel. That's because function arguments are *always* handled by SDISel. Introduce FastLowerArguments to allow each target to provide hook to handle formal argument lowering. As a proof-of-concept, add ARMFastIsel::FastLowerArguments to handle functions with 4 or fewer scalar integer (i8, i16, or i32) arguments. It completely eliminates the need for SDISel for trivial functions. rdar://13163905 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174855 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11Remove unnecessary code.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174854 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11Fix unnecessary removal of const through cast machineryDavid Blaikie
I have some uncommitted changes to the cast code that catch this sort of thing at compile-time but I still need to do some other cleanup before I can enable it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174853 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-10Spelling correctionJoel Jones
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174852 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-10Fix the unused but nearly correct method SlotIndexes::insertMBBInMaps() and addCameron Zwarich
support for updating SlotIndexes to MachineBasicBlock::SplitCriticalEdge(). This calls renumberIndexes() every time; it should be improved to only renumber locally. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174851 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-10Abstract the liveness checking in PHIElimination::SplitPHIEdges() to supportCameron Zwarich
both LiveVariables and LiveIntervals. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174850 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-10Add support in the bitcode reader to read the attribute groups.Bill Wendling
This reads the attribute groups. It currently doesn't do anything with them. NOTE: In the commit to the bitcode writer, the format *may* change in the near future. Which means that this code would also change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174849 91177308-0d34-0410-b5e6-96231b3b80d8
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