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2013-02-20Fix PR15155: lost vadd/vsplat optimization.Bill Schmidt
During lowering of a BUILD_VECTOR, we look for opportunities to use a vector splat. When the splatted value fits in 5 signed bits, a single splat does the job. When it doesn't fit in 5 bits but does fit in 6, and is an even value, we can splat on half the value and add the result to itself. This last optimization hasn't been working recently because of improved constant folding. To circumvent this, create a pseudo VADD_SPLAT that can be expanded during instruction selection. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175632 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-20Move the SplatByte helper to APInt and generalize it a bit.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175621 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-20I optimized the following patterns:Elena Demikhovsky
sext <4 x i1> to <4 x i64> sext <4 x i8> to <4 x i64> sext <4 x i16> to <4 x i64> I'm running Combine on SIGN_EXTEND_IN_REG and revert SEXT patterns: (sext_in_reg (v4i64 anyext (v4i32 x )), ExtraVT) -> (v4i64 sext (v4i32 sext_in_reg (v4i32 x , ExtraVT))) The sext_in_reg (v4i32 x) may be lowered to shl+sar operations. The "sar" does not exist on 64-bit operation, so lowering sext_in_reg (v4i64 x) has no vector solution. I also added a cost of this operations to the AVX costs table. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175619 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-20[asan] instrument invoke insns with noreturn attribute (as well as call insns)Kostya Serebryany
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175617 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-20Fix thumbv5e frame lowering assertion failure.Logan Chien
It is possible that frame pointer is not found in the callee saved info, thus FramePtrSpillFI may be incorrect if we don't check the result of hasFP(MF). Besides, if we enable the stack coloring algorithm, there will be an assertion to ensure the slot is live. But in the test case, %var1 is not live in the prologue of the function, and we will get the assertion failure. Note: There is similar code in ARMFrameLowering.cpp. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175616 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-20Fully qualify llvm::next to avoid ambiguity when building as C++11.David Blaikie
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175608 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-20Fix the (clang -Werror) build by removing an unused member variable.David Blaikie
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175607 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-20Modify the LLVM assembly output so that it uses references to represent ↵Bill Wendling
function attributes. This makes the LLVM assembly look better. E.g.: define void @foo() #0 { ret void } attributes #0 = { nounwind noinline ssp } git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175605 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-20Add support to the two-address pass for updating LiveIntervals in many of theCameron Zwarich
common transformations. This includes updating repairIntervalsInRange() to handle more cases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175604 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-20Move the computation of the IsEarlyClobber flag into its own loop, since theCameron Zwarich
correct value is needed in every iteration of the loop for updating LiveIntervals. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175603 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-20Add SlotIndexes::repairIndexesInRange(), which repairs SlotIndexes after addingCameron Zwarich
and removing instructions. The implementation seems more complicated than it needs to be, but I couldn't find something simpler that dealt with all of the corner cases. Also add a call to repairIndexesInRange() from repairIntervalsInRange(). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175601 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-20Remove verification after PHIElimination when using LiveIntervals, and move itCameron Zwarich
after the two-address pass. The remaining problems in 'make check' are occurring later. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175598 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-20Avoid recomputing an inserted instruction's SlotIndex.Cameron Zwarich
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175597 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-20Add preservation of SlotIndexes to PHIElimination.Cameron Zwarich
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175596 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-20Expand pseudos/macros:Reed Kotler
SltCCRxRy16, SltiCCRxImmX16, SltiuCCRxImmX16, SltuCCRxRy16 $T8 shows up as register $24 when emitted from C++ code so we had to change some tests that were already there for this functionality. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175593 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-20Add missing #include.Jakub Staszak
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175583 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-20Fix #includes, so we include only what we really need.Jakub Staszak
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175581 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-20Move part of APInt implementation from header to cpp file. These methodsJakub Staszak
require call cpp file anyway, so we wouldn't gain anything by keeping them inline. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175579 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-20clear new map and initialize new variablePedro Artigas
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175578 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-20Add the function attributes from an inline asm call. These don't have ↵Bill Wendling
declarations that set the attribute groups, so we must do it on our own. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175577 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-19[ms-inline asm] Force the use of a base pointer if the MachineFunction includesChad Rosier
MS-style inline assembly. This is a follow-on to r175334. Forcing a FP to be emitted doesn't ensure it will be used. Therefore, force the base pointer as well. We now treat MS inline assembly in the same way we treat functions with dynamic stack realignment and VLAs. This guarantees the BP will be used to reference parameters and locals. rdar://13218191 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175576 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-19Update a portability kludge to keep it in sync with changes in the codeDan Gohman
which uses it. This is not ideal, but it ought to at least restore the behavior to what it was before. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175571 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-19ELF symbol table field st_other support, Jack Carter
excluding visibility bits. Mips (o32 abi) specific e_header setting. EF_MIPS_ABI_O32 needs to be set in the ELF header flags for o32 abi output. Contributer: Reed Kotler git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175569 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-19Remove unused variable.Jakub Staszak
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175568 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-19Minor cleanups. No functionality change.Jakub Staszak
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175567 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-19ELF symbol table field st_other support, Jack Carter
excluding visibility bits. Mips (Mips16) specific e_header setting. EF_MIPS_ARCH_ASE_M16 needs to be set in the ELF header flags for Mips16. Contributer: Reed Kotler git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175566 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-19Remove unneeded #includes.Jakub Staszak
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175565 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-19ELF symbol table field st_other support, Jack Carter
excluding visibility bits. Mips (MicroMips) specific STO handling . The st_other field settig for STO_MIPS_MICROMIPS Contributer: Zoran Jovanovic git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175564 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-19Fix typos.Jakub Staszak
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175562 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-19ELF symbol table field st_other support, Jack Carter
excluding visibility bits. Generic STO handling at the Target level. The st_other field of the ELF symbol table is one byte in size. The first 2 bytes are used for generic visibility and are currently handled by llvm. The other six bits are processor specific and need to be set at the target level. A couple of notes: The new static methods for accessing and setting the "other" flags in include/llvm/MC/MCELF.h match the style guide and not the other methods in the file. I don't like the inconsistency, but feel I should follow the prescribed lowerUpper() convention. STO_ value definitions are not specified in gnu land as consistently as the STT_ and STB_ fields. Probably because the latter were defined in a standards doc and the former defined partially in code. I have stuck with the full byte definition of the flags. Contributer: Zoran Jovanovic git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175561 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-19Add obvious constantness.Jakub Staszak
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175560 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-19ARM NEON: Don't need COPY_TO_REGCLASS in patternArnold Schwaighofer
In my previous commit: "Merge a f32 bitcast of a v2i32 extractelt A vectorized sitfp on doubles will get scalarized to a sequence of an extract_element of <2 x i32>, a bitcast to f32 and a sitofp. Due to the the extract_element, and the bitcast we will uneccessarily generate moves between scalar and vector registers." I added a pattern containing a copy_to_regclass. The copy_to_regclass is actually not needed. radar://13191881 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175555 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-19Fix a bug in mayHaveSideEffects. Functions that do not return are now ↵Nadav Rotem
considered as instructions with side effects. rdar://13227456 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175553 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-19Fix a bug that was found by the clang static analyzer. The var "AT" is null ↵Nadav Rotem
so we cant deref it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175550 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-19Whitelist files and block devices instead of blacklisting fifos andDan Gohman
character devices. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175549 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-19Don't trust st_size of a character device. This fixes usingDan Gohman
/dev/stdin as an input when stdin is connected to a tty, for example. No test, because it's difficult to write a reasonably portable test for this. /dev/stdin isn't a character device when stdin is redirected from a file or connected to a pipe. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175542 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-19ARM: Allocation hints must make sure to be in the alloc order.Jim Grosbach
When creating an allocation hint for a register pair, make sure the hint for the physical register reference is still in the allocation order. rdar://13240556 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175541 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-19Assert that the target provided hints are in the allocation order.Jakob Stoklund Olesen
Target implementations of getRegAllocationHints() should use the provided allocation order, and they can never return hints outside the order. This is already documented in TargetRegisterInfo.h. <rdar://problem/13240556> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175540 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-19Hexagon: Sync TSFlags in MCTargetDesc/HexagonBaseInfo.h withJyotsna Verma
HexagonInstrFormats.td. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175537 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-19Clean up HiPE prologue emission a bit and avoid signed arithmetic tricks.Benjamin Kramer
No intended functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175536 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-19Move LLVM_LIBRARY_VISIBILITY for consistency with what was done toRafael Espindola
PPCJITInfo.cpp in r175394. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175531 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-19Fix GCMetadaPrinter::finishAssembly not executed, patch by Yiannis Tsiouris.Benjamin Kramer
Due to the execution order of doFinalization functions, the GC information were deleted before AsmPrinter::doFinalization was executed. Thus, the GCMetadataPrinter::finishAssembly was never called. The patch fixes that by moving the code of the GCInfoDeleter::doFinalization to Printer::doFinalization. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175528 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-19Make ARMAsmPrinter pass name more precise and fix comment.Eli Bendersky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175527 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-19Make pass name more precise and fix comment.Eli Bendersky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175525 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-19ARM NEON: Merge a f32 bitcast of a v2i32 extracteltArnold Schwaighofer
A vectorized sitfp on doubles will get scalarized to a sequence of an extract_element of <2 x i32>, a bitcast to f32 and a sitofp. Due to the the extract_element, and the bitcast we will uneccessarily generate moves between scalar and vector registers. The patch fixes this by using a COPY_TO_REGCLASS and a EXTRACT_SUBREG to extract the element from the vector instead. radar://13191881 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175520 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-19R600: Add AR_X to the R600_TReg_X register class.Tom Stellard
NOTE: This is a candidate for the Mesa stable branch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175519 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-19R600: Mark all members of the TRegMem register class as reservedTom Stellard
This stops the Machine Verifier from complaining about uses of undefined physical registers. NOTE: This is a candidate for the Mesa stable branch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175518 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-19R600: Fix scheduler crash caused by invalid MachinePointerInfoTom Stellard
Kernel function arguments are lowered to loads from the PARAM_I address space. When creating these load instructions, we were initializing their MachinePointerInfo with an Arguement object that was not attached to any function. This was causing the MachineScheduler to crash when it tried to access the parent of the Arguement. This has been fixed by initializing the MachinePointerInfo with a UndefValue instead. NOTE: This is a candidate for the Mesa stable branch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175517 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-19R600: Fix tracking of implicit defs in the IndirectAddressing passTom Stellard
In some cases, we were losing track of live implicit registers which was creating dead defs and causing the scheduler to produce invalid code. NOTE: This is a candidate for the Mesa stable branch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175516 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-19Fix initialization-order bug in llvm::Support::TimeValue. TimeValue::now() ↵Alexey Samsonov
is explicitly called during module initialization of lib/Support/Process.cpp. It reads the field of global object PosixZeroTime, which is not guaranteed to be initialized at this point. Found by AddressSanitizer with -fsanitize=init-order option. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175509 91177308-0d34-0410-b5e6-96231b3b80d8
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