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2012-05-20Do not pass an invalid domtree to SimplifyInstruction fromPeter Collingbourne
LoopUnswitch. Fixes PR12887. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157140 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-19Simplify overlap check.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157137 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-19Fix 12892.Jakob Stoklund Olesen
Dead code elimination during coalescing could cause a virtual register to be split into connected components. The following rewriting would be confused about the already joined copies present in the code, but without a corresponding value number in the live range. Erase all joined copies instantly when joining intervals such that the MI and LiveInterval representations are always in sync. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157135 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-19Do not eliminate allocas whose alignment exceeds that of thePeter Collingbourne
copied-in constant, as a subsequent user may rely on over alignment. Fixes PR12885. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157134 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-19Add a FIXME about access to negative stack-pointer offsets on PPC32.Hal Finkel
The current code will generate a prologue which starts with something like: mflr 0 stw 31, -4(1) stw 0, 4(1) stwu 1, -16(1) But under the PPC32 SVR4 ABI, access to negative offsets from R1 is not allowed. This was pointed out by Peter Bergner. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157133 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-19Remove the late DCE in RegisterCoalescer.Jakob Stoklund Olesen
Dead code and joined copies are now eliminated on the fly, and there is no need for a post pass. This makes the coalescer work like other modern register allocator passes: Code is changed on the fly, there is no pending list of changes to be committed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157132 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-19Erase joined copies immediately.Jakob Stoklund Olesen
The late dead code elimination is no longer necessary. The test changes are cause by a register hint that can be either %rdi or %rax. The choice depends on the use list order, which this patch changes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157131 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-19Fix an ancient bug in removeCopyByCommutingDef().Jakob Stoklund Olesen
Before rewriting uses of one value in A to register B, check that there are no tied uses. That would require multiple A values to be rewritten. This bug can't bite in the current version of the code for a fairly subtle reason: A tied use would have caused 2-addr to insert a copy before the use. If the copy has been coalesced, it will be found by the same loop changed by this patch, and the optimization is aborted. This was exposed by 400.perlbench and lua after applying a patch that deletes joined copies aggressively. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157130 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-19On Haswell, perfer storing YMM registers using a single instruction.Nadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157129 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-19Add support for additional in-reg vbroadcast patternsNadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157127 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-19Collect inflatable virtual registers on the fly.Jakob Stoklund Olesen
There is no reason to defer the collection of virtual registers whose register class may be replaced with a larger class. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157125 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-19Move CallbackVHs dtor inline, it can be devirtualized in many cases. Move ↵Benjamin Kramer
the other virtual methods out of line as they are only called from within Value.cpp anyway. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157123 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-19Tidy up some spacing and inconsistent use of pre/post increment. No ↵Craig Topper
functional change intended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157122 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-19Ordinary PR1255 patch: DifferenceEngine and CPPBackend adopted to the new ↵Stepan Dyatkovskiy
SwitchInst methods. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157112 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-19Copy some AVX support from MCJIT to JIT. Maybe will fix PR12748.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157109 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-19Eliminate dead code after remat.Jakob Stoklund Olesen
This will remove the original def once it has no more uses. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157104 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-19Don't remat during updateRegDefsUses().Jakob Stoklund Olesen
Remaining virtreg->physreg copies were rematerialized during updateRegDefsUses(), but we already do the same thing in joinCopy() when visiting the physreg copy instruction. Eliminate the preserveSrcInt argument to reMaterializeTrivialDef(). It is now always true. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157103 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-19Immediately erase trivially useless copies.Jakob Stoklund Olesen
There is no need for these instructions to stick around since they are known to be not dead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157102 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-19Run proper recursive dead code elimination during coalescing.Jakob Stoklund Olesen
Dead copies cause problems because they are trivial to coalesce, but removing them gived the live range a dangling end point. This patch enables full dead code elimination which trims live ranges to their uses so end points don't dangle. DCE may erase multiple instructions. Put the pointers in an ErasedInstrs set so we never risk visiting erased instructions in the work list. There isn't supposed to be any dead copies entering RegisterCoalescer, but they do slip by as evidenced by test/CodeGen/X86/coalescer-dce.ll. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157101 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-19Allow LiveRangeEdit to be created with a NULL parent.Jakob Stoklund Olesen
The dead code elimination with callbacks is still useful. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157100 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-19Actually support DW_TAG_rvalue_reference_type that we were tryingEric Christopher
to generate out of the front end. rdar://11479676 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157094 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-19Add support for the 'd' mips inline asm output modifier.Eric Christopher
Patch by Jack Carter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157093 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-19SCEV: Add MarkPendingLoopPredicates to avoid recursive isImpliedCond.Andrew Trick
getUDivExpr attempts to simplify by checking for overflow. isLoopEntryGuardedByCond then evaluates the loop predicate which may lead to the same getUDivExpr causing endless recursion. Fixes PR12868: clang 3.2 segmentation fault. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157092 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-18Fix replacing all the users of objc weak runtime routinesDan Gohman
when deleting them. rdar://11434915. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157080 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-18Modernize naming convention for class members.Jakob Stoklund Olesen
No functional change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157079 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-18Move all work list processing to copyCoalesceWorkList().Jakob Stoklund Olesen
This will make it possible to filter out erased instructions later. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157073 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-18allow LazyValueInfo::getEdgeValue() to reason about multiple edges from the ↵Nuno Lopes
same switch instruction by doing union of ranges (which may still be conservative, but it's more aggressive than before) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157071 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-18Refactor data-in-code annotations.Jim Grosbach
Use a dedicated MachO load command to annotate data-in-code regions. This is the same format the linker produces for final executable images, allowing consistency of representation and use of introspection tools for both object and executable files. Data-in-code regions are annotated via ".data_region"/".end_data_region" directive pairs, with an optional region type. data_region_directive := ".data_region" { region_type } region_type := "jt8" | "jt16" | "jt32" | "jta32" end_data_region_directive := ".end_data_region" The previous handling of ARM-style "$d.*" labels was broken and has been removed. Specifically, it didn't handle ARM vs. Thumb mode when marking the end of the section. rdar://11459456 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157062 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-18Remove duplicate code that we could just fallthrough to.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157060 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-18Simplify RegisterCoalescer::copyCoalesceInMBB().Jakob Stoklund Olesen
It is no longer necessary to separate VirtCopies, PhysCopies, and ImpDefCopies. Implicitly defined copies are extremely rare after we added the ProcessImplicitDefs pass, and physical register copies are not joined any longer. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157059 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-18Add support for the mips 'x' inline asm modifier.Eric Christopher
Patch by Jack Carter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157057 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-18Remove support for PhysReg joining.Jakob Stoklund Olesen
This has been disabled for a while, and it is not a feature we want to support. Copies between physical and virtual registers are eliminated by good hinting support in the register allocator. Joining virtual and physical registers is really a form of register allocation, and the coalescer is not properly equipped to do that. In particular, it cannot backtrack coalescing decisions, and sometimes that would cause it to create programs that were impossible to register allocate, by exhausting a small register class. It was also very difficult to keep track of the live ranges of aliasing registers when extending the live range of a physreg. By disabling physreg joining, we can let fixed physreg live ranges remain constant throughout the register allocator super-pass. One type of physreg joining remains: A virtual register that has a single value which is a copy of a reserved register can be merged into the reserved physreg. This always lowers register pressure, and since we don't compute live ranges for reserved registers, there are no problems with aliases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157055 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-18Recommited reworked r156804:Stepan Dyatkovskiy
SelectionDAGBuilder::Clusterify : main functinality was replaced with CRSBuilder::optimize, so big part of Clusterify's code was reduced. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157046 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-18Simplify code a bit. No functional change intended.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157044 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-18Simplify handling of v16i8 shuffles and fix a missed optimization.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157043 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-18Teach two-address pass to update the "source" map so it doesn't perform aEvan Cheng
non-profitable commute using outdated info. The test case would still fail because of poor pre-RA schedule. That will be fixed by MI scheduler. rdar://11472010 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157038 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-18Clarify comment.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157033 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-18fix corner case in ConstantRange::intersectWith().Nuno Lopes
this fixes the missed optimization I was seeing in the CorrelatedValuePropagation pass git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157032 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-17minor simplification in the call to ConstantRange constructorNuno Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157024 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-17commentsAndrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157020 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-17Fix the encoding of the armv7m (MClass) for MSR APSR writes which was missingKevin Enderby
the 0b10 mask encoding bits. Make MSR APSR writes without a _<bits> qualifier an alias for MSR APSR_nzcvq even though ARM as deprecated it use. Also add support for suffixes (_nzcvq, _g, _nzcvqg) for APSR versions. Some FIXMEs in the code for better error checking when versions shouldn't be used. rdar://11457025 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157019 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-17Remove extraneous ';'.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157011 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-17misched: trace ReadyQ.Andrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157007 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-17misched: Added 3-level regpressure back-off.Andrew Trick
Introduce the basic strategy for register pressure scheduling. 1) Respect target limits at all times. 2) Indentify critical register classes (pressure sets). Track pressure within the scheduled region. Avoid increasing scheduled pressure for critical registers. 3) Avoid exceeding the max pressure of the region prior to scheduling. Added logic for picking between the top and bottom ready Q's based on regpressure heuristics. Status: functional but needs to be asjusted to achieve good results. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157006 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-17commentAndrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157005 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-17regpressure: Fix getMaxUpwardPressureDelta.Andrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157004 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-17misched: fix liveness iteratorsAndrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157003 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-17whitespaceAndrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157002 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-17Never clear <undef> flags on already joined copies.Jakob Stoklund Olesen
RegisterCoalescer set <undef> flags on all operands of copy instructions that are scheduled to be removed. This is so they won't affect shrinkToUses() by introducing false register reads. Make sure those <undef> flags are never cleared, or shrinkToUses() could cause live intervals to end at instructions about to be deleted. This would be a lot simpler if RegisterCoalescer could just erase joined copies immediately instead of keeping all the to-be-deleted instructions around. This fixes PR12862. Unfortunately, bugpoint can't create a sane test case for this. Like many other coalescer problems, this failure depends of a very fragile series of events. <rdar://problem/11474428> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157001 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-17Fix a verifier bug.Jakob Stoklund Olesen
Make sure useless (def-only) intervals also get verified. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157000 91177308-0d34-0410-b5e6-96231b3b80d8
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