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2011-04-14As Dan pointed out, movzbl, movsbl, and friends are nicer than their aliasBill Wendling
(movzx/movsx) because they give more information. Revert that part of the patch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129498 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-14Have the X86 back-end emit the alias instead of what's being aliased. In mostBill Wendling
cases, it's much nicer and more informative reading the alias. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129497 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-13Add an option to not print the alias of an instruction. It defaults to "printBill Wendling
the alias". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129485 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-13During post-legalization DAG combining, be careful to only create shifts ↵Owen Anderson
where the RHS is of the legal type for the new operation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129484 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-13Thumb disassembler did not handle tBRIND (indirect branch) properly.Johnny Chen
rdar://problem/9280370 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129480 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-13Vectors with different number of elements of the same element type can haveMon P Wang
the same allocation size but different primitive sizes(e.g., <3xi32> and <4xi32>). When ScalarRepl promotes them, it can't use a bit cast but should use a shuffle vector instead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129472 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-13Check for unallocated instruction encodings when disassembling Thumb Branch ↵Johnny Chen
instructions (tBcc and t2Bcc). rdar://problem/9280470 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129471 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-13The LDR*T/STR*T (unpriviledged load/store) operations don't take SP or PC as Rt.Johnny Chen
rdar://problem/9279440 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129469 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-13Fix a typo in an ARM-specific DAG combine. This fixes <rdar://problem/9278274>.Cameron Zwarich
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129468 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-13Fix a regression caused by r102515 where explicit alignment on globals isCameron Zwarich
ignored. There was a test to catch this, but it was just blindly updated in a large change. This fixes another part of <rdar://problem/9275290>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129466 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-13Fix debug message.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129463 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-13Check the corner cases for t2LDRSHi12 correctly and mark invalid encodings ↵Johnny Chen
as such. rdar://problem/9276651 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129462 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-13Remove extra bytes that were added for gdb. We do not have good poiner to ↵Devang Patel
understand actual reason behind this fixme. Spot checking suggest that newer gdb does not need this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129461 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-13Fix a bug where for t2MOVCCi disassembly, the TIED_TO register operand was ↵Johnny Chen
not properly handled. rdar://problem/9276427 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129456 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-13Forgot to add this change for ↵Johnny Chen
http://llvm.org/viewvc/llvm-project?view=rev&revision=129387. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129451 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-13Fixed the revision 129449.Junjie Gu
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129450 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-13Passing unroll parameters (unroll-count, threshold, and partial unroll) via ↵Junjie Gu
LoopUnroll class's ctor. Doing so will allow multiple context with different loop unroll parameters to run. This is a minor change and no effect on existing application. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129449 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-13Add the alias analysis to the C api.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129447 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-13MCJIT relocation resolution.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129445 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-13PR9214: Convert ConstantExpr::getIndices() to return an ArrayRef, plusJay Foad
related tweaks to ExprMapKeyType. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129443 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-13Stop using dead function.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129442 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-13Remove some redundant llvm:: prefixes.Jay Foad
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129441 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-13PR9214: Convert ConstantExpr::getWithOperands() to use ArrayRef.Jay Foad
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129439 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-13Like the coding standards say, do not use "using namespace std".Jay Foad
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129435 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-13Fix an obvious problem with an alignment computation. AsmPrinter actually doesCameron Zwarich
the max itself, so it is not easy to write a test case for this, but I added a test case that would fail if the code in AsmPrinter were removed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129432 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-13Fix a typo.Cameron Zwarich
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129429 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-13If a global variable has a specified alignment that is less than the preferredCameron Zwarich
alignment for its type, use the minimum of the specified alignment and the ABI alignment. This fixes <rdar://problem/9275290>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129428 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-13Recommit r129383. PreRA scheduler heuristic fixes: VRegCycle, TokenFactor ↵Andrew Trick
latency. Additional fixes: Do something reasonable for subtargets with generic itineraries by handle node latency the same as for an empty itinerary. Now nodes default to unit latency unless an itinerary explicitly specifies a zero cycle stage or it is a TokenFactor chain. Original fixes: UnitsSharePred was a source of randomness in the scheduler: node priority depended on the queue data structure. I rewrote the recent VRegCycle heuristics to completely replace the old heuristic without any randomness. To make the ndoe latency adjustments work, I also needed to do something a little more reasonable with TokenFactor. I gave it zero latency to its consumers and always schedule it as low as possible. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129421 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-13Reapply r129401 with patch for clang.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129419 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-13Temporarily revert r129408 to see if it brings the bots back.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129417 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-12Be consistent about being virtual and returning void in the cfi methods.Rafael Espindola
Implement the ones that were missing in the asm streamer. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129413 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-12Add sanity check for Ld/St Dual forms of Thumb2 instructions.Johnny Chen
rdar://problem/9273947 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129411 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-12Add @earlyclobber constraints to the writeback register of all ARM store ↵Jakob Stoklund Olesen
instructions. The ARMARM specifies these instructions as unpredictable when storing the writeback register. This shouldn't affect code generation much since storing a pointer to itself is quite rare. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129409 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-12Fix a bug where we were counting the alias sets as completely usedEric Christopher
registers for fast allocation. Fixes rdar://9207598 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129408 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-12I missed this new file in previous commit.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129407 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-12Simplify. There is no need to use static variable.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129406 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-12Do not reuse parameter name.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129405 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-12Revert r129401 for now. Clang is using the old way of doing things.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129403 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-12This mechanical patch moves type handling into CompileUnit from DwarfDebug. ↵Devang Patel
In case of multiple compile unit in one object file, each compile unit is responsible for its own set of type entries anyway. This refactoring makes this obvious. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129402 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-12Remove the unaligned load intrinsics in favor of using native unaligned loads.Bill Wendling
Now that we have a first-class way to represent unaligned loads, the unaligned load intrinsics are superfluous. First part of <rdar://problem/8460511>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129401 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-12Add more comments... err debug statements to the fast allocator.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129400 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-12The Thumb2 RFE instructions need to have their second halfword fully specified.Johnny Chen
In addition, the base register is not rGPR, but GPR with th exception that: if n == 15 then UNPREDICTABLE rdar://problem/9273836 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129391 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-12SparseBitVector is SLOW.Jakob Stoklund Olesen
Use a Bitvector instead, we didn't need the smaller memory footprint anyway. This makes the greedy register allocator 10% faster. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129390 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-12MCJIT lazy relocation resolution and symbol address re-assignment.Jim Grosbach
Add handling for tracking the relocations on symbols and resolving them. Keep track of the relocations even after they are resolved so that if the RuntimeDyld client moves the object, it can update the address and any relocations to that object will be updated. For our trival object file load/run test harness (llvm-rtdyld), this enables relocations between functions located in the same object module. It should be trivially extendable to load multiple objects with mutual references. As a simple example, the following now works (running on x86_64 Darwin 10.6): $ cat t.c int bar() { return 65; } int main() { return bar(); } $ clang t.c -fno-asynchronous-unwind-tables -o t.o -c $ otool -vt t.o t.o: (__TEXT,__text) section _bar: 0000000000000000 pushq %rbp 0000000000000001 movq %rsp,%rbp 0000000000000004 movl $0x00000041,%eax 0000000000000009 popq %rbp 000000000000000a ret 000000000000000b nopl 0x00(%rax,%rax) _main: 0000000000000010 pushq %rbp 0000000000000011 movq %rsp,%rbp 0000000000000014 subq $0x10,%rsp 0000000000000018 movl $0x00000000,0xfc(%rbp) 000000000000001f callq 0x00000024 0000000000000024 addq $0x10,%rsp 0000000000000028 popq %rbp 0000000000000029 ret $ llvm-rtdyld t.o -debug-only=dyld ; echo $? Function sym: '_bar' @ 0 Function sym: '_main' @ 16 Extracting function: _bar from [0, 15] allocated to 0x100153000 Extracting function: _main from [16, 41] allocated to 0x100154000 Relocation at '_main' + 16 from '_bar(Word1: 0x2d000000) Resolving relocation at '_main' + 16 (0x100154010) from '_bar (0x100153000)(pcrel, type: 2, Size: 4). loaded '_main' at: 0x100154000 65 $ git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129388 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-12Add bad register checks for Thumb2 Ld/St instructions.Johnny Chen
rdar://problem/9269047 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129387 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-12Revert 129383. It causes some targets to hit a scheduler assert.Andrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129385 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-12PreRA scheduler heuristic fixes: VRegCycle, TokenFactor latency.Andrew Trick
UnitsSharePred was a source of randomness in the scheduler: node priority depended on the queue data structure. I rewrote the recent VRegCycle heuristics to completely replace the old heuristic without any randomness. To make these heuristic adjustments to node latency work, I also needed to do something a little more reasonable with TokenFactor. I gave it zero latency to its consumers and always schedule it as low as possible. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129383 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-12Create new intervals for isolated blocks during region splitting.Jakob Stoklund Olesen
This merges the behavior of splitSingleBlocks into splitAroundRegion, so the RS_Region and RS_Block register stages can be coalesced. That means the leftover intervals after region splitting go directly to spilling instead of a second pass of per-block splitting. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129379 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-12Remove LastOffset from the asm parser.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129378 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-12The Thumb2 Ld, St, and Preload instructions with the i12 forms should have ↵Johnny Chen
its Inst{23} be specified as '1' (add = TRUE). Also add a utility function for Thumb2. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129377 91177308-0d34-0410-b5e6-96231b3b80d8
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