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2011-07-19Revert r135423.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135454 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19Micro-opt: Only emit compact unwind if there is a compact unwind encoding to ↵Bill Wendling
emit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135452 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19Use the CompactUnwindEncoding from the Frame, if it's defined.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135451 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19Add a frame with the compact unwind encoding if it exists.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135450 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19Add a method to set compact unwind encoding information in a frame.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135449 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19Rename CompactEncoding to CompactUnwindEncoding.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135448 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19Fixed a bug where the MC subtarget informationSean Callanan
wasn't being initialized by the enhanced disassembler, leading to assertion failures. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135447 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-18Move the compact encoding from the target-specific library to the code-genBill Wendling
library. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135443 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-18Revamp our handling of tLDMIA[_UPD] and tSTMIA[_UPD] to avoid having ↵Owen Anderson
multiple instructions with the same encoding. This resolves another conflict when bringing up the new-style disassembler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135442 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-18Eliminate TargetAsmInfo::getCompactUnwindEncoding. This get rid of theEvan Cheng
use of TargetFrameLowering in TargetAsmInfo. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135439 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-18Move getInitialFrameState from TargetFrameInfo to MCAsmInfo (suggestions forEvan Cheng
better location welcome). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135438 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-18Mark the Darwin assembler workout as isCodeGenOnly, so that it doesn't cause ↵Owen Anderson
decoding conflicts in the new-style disassembler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135434 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-18Add APInt(numBits, ArrayRef<uint64_t> bigVal) constructor to prevent future ↵Jeffrey Yasskin
ambiguity errors like the one corrected by r135261. Migrate all LLVM callers of the old constructor to the new one. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135431 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-18Compiler warning.Andrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135426 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-18Sink getDwarfRegNum, getLLVMRegNum, getSEHRegNum from TargetRegisterInfo downEvan Cheng
to MCRegisterInfo. Also initialize the mapping at construction time. This patch eliminate TargetRegisterInfo from TargetAsmInfo. It's another step towards fixing the layering violation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135424 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-18During bottom up fast-isel, instructions emitted to materalize registers are ↵Devang Patel
at top of basic block and do not have debug location. This may misguide debugger while entering the basic block and sometimes debugger provides semi useful view of current location to developer by picking up previous known location as current location. Assign a sensible location to the first instruction in a basic block, if it does not have one location derived from source file, so that debugger can provide meaningful user experience to developers in edge cases. [take 2] git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135423 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-18indvars: LinearFunctionTestReplace for non-canonical IVs.Andrew Trick
For -disable-iv-rewrite, perform LFTR without generating a new "canonical" induction variable. Instead find the "best" existing induction variable for use in the loop exit test and compute the final value of that IV for use in the new loop exit test. In short, convert to a simple eq/ne exit test as long as it's cheap to do so. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135420 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-18Do not treat atomic.load.sub differently than other atomic binary intrinsics.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135418 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-18Set mayLoad or mayStore flags for SC and LL in order to prevent LICM from Akira Hatanaka
moving them out of the loop. Previously, stores and loads to a stack frame object were inserted to accomplish this. Remove the code that was needed to do this. Patch by Sasa Stankovic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135415 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-18Re-apply r135319 with a fix for the constant island pass.Owen Anderson
Original Log: Get rid of the separate opcodes for the Darwin versions of tBL, tBLXi, and tBLXr, using pseudo-instructions to lower to the single final opcode. Update the ARM disassembler for this change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135414 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-18Fix a crash when building 177.mesa for armv6.Jakob Stoklund Olesen
When splitting a live range immediately before an LDR_POST instruction that redefines the address register, make sure to use the correct value number in leaveIntvBefore. We need the value number entering the instruction. <rdar://problem/9793765> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135413 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-18indvars: Added verification that LFTR and other indvars goodness doesAndrew Trick
not interfere with BackedgeTakenCount computation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135412 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-18indvars: Added isHighCostExpansion. Avoid generating extra ops in theAndrew Trick
preheader for the sole purpose of LFTR, since LFTR itself is usually not a clear optimization. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135409 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-18Be more smart with VCVTSS2SD. Also place the patterns close to theBruno Cardoso Lopes
definitions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135407 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-18Add AVX 128-bit sqrt versionsBruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135404 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-18Change destination register operands of SC instructions so that uniqueAkira Hatanaka
virtual registers are used. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135403 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-18Migrate LLVM and Clang to use the new makeArrayRef(...) functions where ↵Frits van Bommel
previously explicit non-default constructors were used. Mostly mechanical with some manual reformatting. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135390 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-18Fix PR10387.Jakob Stoklund Olesen
When trying to rematerialize a value before an instruction that has an early-clobber redefine of the virtual register, make sure to look up the correct value number. Early-clobber defs are moved one slot back, so getBaseIndex is needed to find the used value number. Bugpoint was unable to reduce the test case for this, see PR10388. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135378 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-18land David Blaikie's patch to de-constify Type, with a few tweaks.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135375 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-18fix a warning in TinyPtrVector, adopt it in SSAUpdater, saving someChris Lattner
mallocs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135366 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-18Simplify & microoptimize code. No intended functionality change.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135364 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-17Minor code cleanupsNadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135362 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-17tidy upChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135360 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-16Silence compiler warnings.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135358 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-16Remove unused LoopRanges from RegAllocGreedy.Jakub Staszak
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135354 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-16Remove "LoopInfo.h" include from BranchProbabilityInfo.h.Jakub Staszak
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135353 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-16Add MachineBlockFrequency analysis.Jakub Staszak
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135352 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-16Revert r135319 in an attempt to get to unbreak testers.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135343 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-16Silence unused variable warningMatt Beaumont-Gay
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135339 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-16indvars: fix a pass-sensitivity issue that would hit the SCEVExpanderAndrew Trick
assertion I added in r135333. Check for the existence of a preheader before expanding a recurrence. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135335 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-16indvars: remove ExprToIVMap because it won't be needed by LFTR.Andrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135334 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-16Fix SCEVEXpander to handle arbitrary phi expansion. Includes twoAndrew Trick
related bug fixes and corresponding assertions for uninitialized data and missing NULL check. Test cases will be included with the new LFTR. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135333 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-16Add AVX 128-bit patterns for sint_to_fpBruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135332 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-16He said *before* the last split point.Jakob Stoklund Olesen
This should unbreak the build-self-4-mingw32 tester. I have a very complicated test case that I will try to clean up. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135329 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-15fix rdar://9776316 - type remapping needed for inline asm blobs,Chris Lattner
fixing some objc llvm-test crashes with LTO. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135324 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-15deconstify getType()'s.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135323 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-15LegalizeDAG doesn't need its own copy of this enum.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135320 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-15Get rid of the separate opcodes for the Darwin versions of tBL, tBLXi, and ↵Owen Anderson
tBLXr, using pseudo-instructions to lower to the single final opcode. Update the ARM disassembler for this change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135319 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-15Delete LegalizeDAG's own version of isTypeLegal and getTypeActionDan Gohman
and just use the ones from TargetLowering directly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135318 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-15Fix a couple of things:Bruno Cardoso Lopes
1) Make non-legal 256-bit loads to be promoted to v4i64. This lets us canonize the loads and handle things the same way we use to handle for 128-bit registers. Despite of what one of the removed comments explained, the load promotion would not mess with VPERM, it's only a matter of doing the appropriate bitcasts when this instructions comes to be introduced. Also make LOAD v8i32 legal. 2) Doing 1) exposed two bugs: - v4i64 was being promoted to itself for several opcodes (introduced in r124447 by David Greene) causing endless recursion and the stack to explode. - there was no support for allOnes BUILD_VECTORs and ANDNP would fail to match because it was generating early target constant pools during lowering. 3) The testcases are already checked-in, doing 1) exposed the bugs in the current testcases. 4) Tidy up code to be more clear and explicit about AVX. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135313 91177308-0d34-0410-b5e6-96231b3b80d8
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