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2011-09-20Thumb2 assembly parsing and encoding for UQASX/UQSAX.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140111 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-20Thumb1 convenience aliases for disassembler round-trip testing. CPS instruction.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140108 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-20Thumb CPS definition is not disassembler only.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140106 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-19Thumb2 range check on CPS mode immediate.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140105 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-19tMOVSr is not allowed in an IT block either.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140104 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-19CPS instructions are UNPREDICTABLE inside IT blocks.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140102 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-19Tidy up comments.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140099 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-19Fix PR10949. Fix the encoding of VMOVPQIto64rr.Bruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140098 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-19Based on the small opt Zvi's patch was trying to achieve, eliminateBruno Cardoso Lopes
128-bit undef subvector insertion into a 256-bit vector git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140097 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-19Thumb2 assembly parsing and encoding for UMAAL/UMLAL/UMULL.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140095 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-19Revert r140083 and r140084 until buildbots can be fixed.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140094 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-19Thumb2 assembly parsing and encoding for UHASX/UHSAX.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140088 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-19Thumb2 assembly parsing and encoding for UASX.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140085 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-19If we are extracting a basic block that ends in an invoke call, we must alsoBill Wendling
extract the landing pad block. Otherwise, there will be a situation where the invoke's unwind edge lands on a non-landing pad. We also forbid the user from extracting the landing pad block by itself. Again, this is not a valid transformation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140083 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-19Thumb2 TBB and TBH instructions are only allowed at the end of IT blocks, ↵Owen Anderson
not in the middle. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140079 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-19Thumb2 assembly parsing and encoding for TBB/TBH.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140078 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-19Fix an infinite loop where a transform in InstCombiner::visitAnd claims a ↵Eli Friedman
construct is changed when it is not. (See included testcase.) Patch by Xiaoyi Guo. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140072 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-19Match X86ISD::FSETCCsd and X86ISD::FSETCCss while in AVX mode. This fixBruno Cardoso Lopes
PR10955 and PR10948. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140069 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-19Rename LLVM_MULTITHREADED define and fix build without threads.Eric Christopher
Patch by Arrowdodger. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140064 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-19Tidy up a bit.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140050 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-19Thumb2 assembly parsing and encoding for SXTB/SXTB16/SXTH.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140047 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-19Make changes to avoid creating nested CALLSEQ_START/END constructs, which aren'tAkira Hatanaka
yet legal according to comments in LegalizeDAG.cpp:227. Memcpy nodes created for copying byval arguments are inserted before CALLSEQ_START. The two failing tests reported in PR10876 pass after applying this patch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140046 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-19Silence -Wsign-compare warnings from GCC.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140043 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-19Specify an additional fixed bit in the Thumb2 SSAT encoding to prevent the ↵Owen Anderson
decoder from emitting gibberish for this invalid encoding. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140041 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-19Fix a typo in the bitcode reader in the handling of atomic stores. Reported ↵Eli Friedman
by David Meyer on llvmdev. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140040 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-19ARM asm parsing should handle pre-indexed writeback w/o immediate.Jim Grosbach
For example, 'ldrb r9, [sp]!' is odd, but valid. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140035 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-19Handle STRT (and friends) like LDRT (and friends) for decoding purposes. ↵Owen Anderson
Port over additional encoding tests to decoding tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140032 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-19Thumb2 assembly parsing and encoding for SXTAB/SXTAB16/SXTAH.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140029 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-19MCInstrAnalysis: Don't crash on instructions with no operands.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140027 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-19[indvars] Fix PR10946: SCEV cannot handle Vector IVs.Andrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140026 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-19Add Win32 support to llvm::llvm_execute_on_thread(). Thanks to Aaron Ballman!NAKAMURA Takumi
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140011 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-18Fix typos in my prev commit, found by Tobi.Nadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140003 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-18setOperationAction should be done on the return value of the type, not the ↵Nadav Rotem
operands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140001 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-18When promoting integer vectors we often create ext-loads. This patch adds aNadav Rotem
dag-combine optimization to implement the ext-load efficiently (using shuffles). For example the type <4 x i8> is stored in memory as i32, but it needs to find its way into a <4 x i32> register. Previously we scalarized the memory access, now we use shuffles. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139995 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-18white space cleanupsNadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139994 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-18Fix typo by changing Lower256IntVETCC to Lower256IntVSETCC.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139993 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-17Synthesize x86 max/min instructions also for vectors (i.e. produceDuncan Sands
maxps and maxpd). This broke the sse41-blend.ll testcase by causing maxpd to be produced rather than a cmp+blend pair, which is the reason I tweaked it. Gives a small speedup on doduc with dragonegg when the GCC vectorizer is used. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139986 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-16Describe more AVX 128-bit convert instructions without patterns to haveBruno Cardoso Lopes
mayLoad = 1 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139973 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-16Bitfield mask instructions are unpredictable if the encoded LSB is higher ↵Owen Anderson
than the encoded MSB. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139972 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-16Fix bitfield decoding based on Eli's feedback.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139969 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-16Thumb2 assembly parsing and encoding for SUB(immediate).Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139966 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-16Thumb2 pre-indexed loads/stores use the restricted GPR set for Rt.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139965 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-16Fix disassembly of Thumb2 BFI instructions with bit range of [0, 32).Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139964 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-16Add fixed bits to correctly distinguish Thumb2 SSAT/SSAT16's.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139958 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-16Add mayLoad attribute to AVX convert instructions, since non of themBruno Cardoso Lopes
are declared with load patterns. This fix the crash in PR10941. No testcases, since a fold is triggered and then converted back to the register form afterwards. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139953 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-16Thumb2 assembly parsing and encoding for STR.Jim Grosbach
More addressing mode encoding bits. Handle pre increment for STR/STRB/STRH and STR(register). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139949 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-16Tidy up. 80 columns.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139944 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-16Fix disassembly of Thumb2 LDRSH with a #-0 offset.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139943 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-16Thumb2 assembly parsing and encoding for STR(immediate).Jim Grosbach
Add aliases for STRB/STRH while there. Tests forthcoming for those. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139942 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-16Fix PR10884.Bruno Cardoso Lopes
This PR basically reports a problem where a crash in generated code happened due to %rbp being clobbered: pushq %rbp movq %rsp, %rbp .... vmovmskps %ymm12, %ebp .... movq %rbp, %rsp popq %rbp ret Since Eric's r123367 commit, the default stack alignment for x86 32-bit has changed to be 16-bytes. Since then, the MaxStackAlignmentHeuristicPass hasn't been really used, but with AVX it becomes useful again, since per ABI compliance we don't always align the stack to 256-bit, but only when there are 256-bit incoming arguments. ReserveFP was only used by this pass, but there's no RA target hook that uses getReserveFP() to check for the presence of FP (since nothing was triggering the pass to run, the uses of getReserveFP() were removed through time without being noticed). Change this pass to use setForceFramePointer, which is properly called by MachineFunction hasFP method. The testcase is very big and dependent on RA, not sure if it's worth adding to test/CodeGen/X86. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139939 91177308-0d34-0410-b5e6-96231b3b80d8
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