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2005-12-10* Added X86 store patterns.Evan Cheng
* Added X86 dec patterns. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24654 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-10Added new getNode and getTargetNode variants for X86 stores.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24653 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-09Add support patterns to many load and store instructions which willNate Begeman
hopefully use patterns in the near future. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24651 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-09Add SDTCisPtrTy and use it for loads, to indicate that the operand of a loadChris Lattner
must be a pointer. This removes a type check out of the code generated by tblgen for load matching. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24650 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-09Added patterns for ADD8rm, etc. These fold load operands. e.g. addb 4(%esp), %alEvan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24648 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-09Avoid emitting two tabs when switching to a named sectionChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24646 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-09Teach the PPC backend about the ctor and dtor list when not using __main andChris Lattner
linking the entire program into one bc file. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24645 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-09Teach legalize how to promote sext_inreg to fix a problem Andrew pointedChris Lattner
out to me. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24644 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-09it helps if your conditionals are not reversedAndrew Lenharth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24641 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-08improve code insertion in two ways:Chris Lattner
1. Only forward subst offsets into loads and stores, not into arbitrary things, where it will likely become a load. 2. If the source is a cast from pointer, forward subst the cast as well, allowing us to fold the cast away (improving cases when the cast is from an alloca or global). This hasn't been fully tested, but does appear to further reduce register pressure and improve code. Lets let the testers grind on it a bit. :) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24640 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-08Add another important case we missChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24639 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-08Added support for ComplexPattern.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24638 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-08Added explicit type field to ComplexPattern.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24637 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-08* Added intelligence to X86 LEA addressing mode matching routine so it returnsEvan Cheng
false if the match is not profitable. e.g. leal 1(%eax), %eax. * Added patterns for X86 integer loads and LEA32. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24635 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-07Fix a crash where ConstantVec nodes were being generated with the wrongNate Begeman
type when the target did not support them. Also teach Legalize how to expand ConstantVecs. This allows us to generate _test: lwz r2, 12(r3) lwz r4, 8(r3) lwz r5, 4(r3) lwz r6, 0(r3) addi r2, r2, 4 addi r4, r4, 3 addi r5, r5, 2 addi r6, r6, 1 stw r2, 12(r3) stw r4, 8(r3) stw r5, 4(r3) stw r6, 0(r3) blr For: void %test(%v4i *%P) { %T = load %v4i* %P %S = add %v4i %T, <int 1, int 2, int 3, int 4> store %v4i %S, %v4i * %P ret void } On PowerPC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24633 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-07Only transform (sext (truncate x)) -> (sextinreg x) if before legalize orChris Lattner
if the target supports the resultant sextinreg git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24632 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-07X86 doesn't support sextinreg for 8-bit things either.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24631 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-07Teach the dag combiner to turn a truncate/sign_extend pair into a sextinregChris Lattner
when the types match up. This allows the X86 backend to compile: sbyte %toggle_value(sbyte* %tmp.1) { %tmp.2 = load sbyte* %tmp.1 ret sbyte %tmp.2 } to this: _toggle_value: mov %EAX, DWORD PTR [%ESP + 4] movsx %EAX, BYTE PTR [%EAX] ret instead of this: _toggle_value: mov %EAX, DWORD PTR [%ESP + 4] movsx %EAX, BYTE PTR [%EAX] movsx %EAX, %AL ret noticed in Shootout/objinst. -Chris git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24630 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-06fix divide and remainderAndrew Lenharth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24628 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-06Silence another annoying GCC warningChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24627 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-06more decent branches for FP. I might have to make some intermediate nodes ↵Andrew Lenharth
to actually be able to use the DAG for FPcmp git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24625 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-06OK, this does wonders for broken stuffAndrew Lenharth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24624 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-06Collapsing node if variable length struct with final field of length zeroSumant Kowshik
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24621 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-06Fix test/Regression/Linker/2005-12-06-AppendingZeroLengthArrays.ll andChris Lattner
PR662. Thanks to Markus for providing me with a ton of files to reproduce the problem! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24619 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-06Teach the SelectionDAG ISel how to turn ConstantPacked values intoNate Begeman
constant nodes with vector types. Also teach the asm printer how to print ConstantPacked constant pool entries. This allows us to generate altivec code such as the following, which adds a vector constantto a packed float. LCPI1_0: <4 x float> < float 0.0e+0, float 0.0e+0, float 0.0e+0, float 1.0e+0 > .space 4 .space 4 .space 4 .long 1065353216 ; float 1 .text .align 4 .globl _foo _foo: lis r2, ha16(LCPI1_0) la r2, lo16(LCPI1_0)(r2) li r4, 0 lvx v0, r4, r2 lvx v1, r4, r3 vaddfp v0, v1, v0 stvx v0, r4, r3 blr For the llvm code: void %foo(<4 x float> * %a) { entry: %tmp1 = load <4 x float> * %a; %tmp2 = add <4 x float> %tmp1, < float 0.0, float 0.0, float 0.0, float 1.0 > store <4 x float> %tmp2, <4 x float> *%a ret void } git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24616 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-06Use new PPC-specific nodes to represent shifts which require the 6-bitChris Lattner
amount handling that PPC provides. These are generated by the lowering code and prevents the dag combiner from assuming (rightfully) that the shifts don't only look at 5 bits. This fixes a miscompilation of crafty with the new front-end. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24615 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-06added instructions with inverted immediatesAndrew Lenharth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24614 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-05yea, it helps to have your path set right when testingAndrew Lenharth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24613 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-05These never trigger, but whateverAndrew Lenharth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24612 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-05Remove unnecessary let hasCtrlDep=1 now it can be inferred.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24611 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-05move this over to the dagAndrew Lenharth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24609 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-05getRawValue zero extens for unsigned values, use getsextvalue so that weChris Lattner
know that small negative values fit into the immediate field of addressing modes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24608 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-05fix constant pool loadsAndrew Lenharth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24607 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-05Fix the #1 code quality problem that I have seen on X86 (and it also affectsChris Lattner
PPC and other targets). In a particular, consider code like this: struct Vector3 { double x, y, z; }; struct Matrix3 { Vector3 a, b, c; }; double dot(Vector3 &a, Vector3 &b) { return a.x * b.x + a.y * b.y + a.z * b.z; } Vector3 mul(Vector3 &a, Matrix3 &b) { Vector3 r; r.x = dot( a, b.a ); r.y = dot( a, b.b ); r.z = dot( a, b.c ); return r; } void transform(Matrix3 &m, Vector3 *x, int n) { for (int i = 0; i < n; i++) x[i] = mul( x[i], m ); } we compile transform to a loop with all of the GEP instructions for indexing into 'm' pulled out of the loop (9 of them). Because isel occurs a bb at a time we are unable to fold the constant index into the loads in the loop, leading to PPC code that looks like this: LBB3_1: ; no_exit.preheader li r2, 0 addi r6, r3, 64 ;; 9 values live across the loop body! addi r7, r3, 56 addi r8, r3, 48 addi r9, r3, 40 addi r10, r3, 32 addi r11, r3, 24 addi r12, r3, 16 addi r30, r3, 8 LBB3_2: ; no_exit lfd f0, 0(r30) lfd f1, 8(r4) fmul f0, f1, f0 lfd f2, 0(r3) ;; no constant indices folded into the loads! lfd f3, 0(r4) lfd f4, 0(r10) lfd f5, 0(r6) lfd f6, 0(r7) lfd f7, 0(r8) lfd f8, 0(r9) lfd f9, 0(r11) lfd f10, 0(r12) lfd f11, 16(r4) fmadd f0, f3, f2, f0 fmul f2, f1, f4 fmadd f0, f11, f10, f0 fmadd f2, f3, f9, f2 fmul f1, f1, f6 stfd f0, 0(r4) fmadd f0, f11, f8, f2 fmadd f1, f3, f7, f1 stfd f0, 8(r4) fmadd f0, f11, f5, f1 addi r29, r4, 24 stfd f0, 16(r4) addi r2, r2, 1 cmpw cr0, r2, r5 or r4, r29, r29 bne cr0, LBB3_2 ; no_exit uh, yuck. With this patch, we now sink the constant offsets into the loop, producing this code: LBB3_1: ; no_exit.preheader li r2, 0 LBB3_2: ; no_exit lfd f0, 8(r3) lfd f1, 8(r4) fmul f0, f1, f0 lfd f2, 0(r3) lfd f3, 0(r4) lfd f4, 32(r3) ;; much nicer. lfd f5, 64(r3) lfd f6, 56(r3) lfd f7, 48(r3) lfd f8, 40(r3) lfd f9, 24(r3) lfd f10, 16(r3) lfd f11, 16(r4) fmadd f0, f3, f2, f0 fmul f2, f1, f4 fmadd f0, f11, f10, f0 fmadd f2, f3, f9, f2 fmul f1, f1, f6 stfd f0, 0(r4) fmadd f0, f11, f8, f2 fmadd f1, f3, f7, f1 stfd f0, 8(r4) fmadd f0, f11, f5, f1 addi r6, r4, 24 stfd f0, 16(r4) addi r2, r2, 1 cmpw cr0, r2, r5 or r4, r6, r6 bne cr0, LBB3_2 ; no_exit This is much nicer as it reduces register pressure in the loop a lot. On X86, this takes the function from having 9 spilled registers to 2. This should help some spec programs on X86 (gzip?) This is currently only enabled with -enable-gep-isel-opt to allow perf testing tonight. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24606 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-05Add a flag to Module::getGlobalVariable to allow it to return vars withChris Lattner
internal linkage. Patch provided by Evan Jones, thanks! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24604 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-05Wrap a long line, never internalize llvm.used.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24602 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-05Several things:Chris Lattner
1. Remove redundant type casts now that PR673 is implemented. 2. Implement the OUT*ir instructions correctly. The port number really *is* a 16-bit value, but the patterns should only match if the number is 0-255. Update the patterns so they now match. 3. Fix patterns for shifts to reflect that the shift amount is always an i8, not an i16 as they were believed to be before. This previous fib stopped working when we started knowing that CL has type i8. 4. Change use of i16i8imm in SH*ri patterns to all be imm. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24599 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-05On some targets (e.g. X86), shift amounts are not the same as the valueChris Lattner
being shifted. Don't assume they are. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24598 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-05Add some explicit type casts so that tblgen knows the type of the ↵Chris Lattner
shiftamount, which is not necessarily the same as the type being shifted. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24595 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-05Add some explicit type casts so that tblgen knows the type of the shiftChris Lattner
amount, which is not necessarily the same as the type being shifted. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24594 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-04The basic fneg cases are already autogen'dChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24592 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-04Autogen matching code for ADJCALLSTACK[UP|DOWN], thanks to Evan's tblgenChris Lattner
improvements. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24591 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-04Finish moving uncond br over to .td file, remove from .cpp file.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24590 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-04Define BR in the .td file now that Evan made tblgen smarter.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24589 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-04Added isel patterns for RET, JMP, and WRITEPORT.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24588 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-04* Added instruction property hasCtrlDep for those which r/w control-flowEvan Cheng
chains. * Added DAG node property SDNPHasChain for nodes which r/w control-flow chains. * Renamed SDTVT to SDTOther. * Added several new SDTypeProfiles for BR, BRCOND, RET, and WRITEPORT. * Added SDNode definitions for BR, BRCOND, RET, and WRITEPORT. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24586 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-04Fix PR672 another way which should be more robustChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24585 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-03dbg.stoppoint returns a value, don't forget to init itChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24583 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-03Fix SimplifyCFG/2005-12-03-IncorrectPHIFold.llChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24581 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-03Fix test/Regression/ExecutionEngine/2005-12-02-TailCallBug.ll and PR672.Chris Lattner
This also fixes 177.mesa, the only program that fails with --enable-x86-fastcc turned on. Given a clean nightly tester run, we should be able to turn it on by default! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24578 91177308-0d34-0410-b5e6-96231b3b80d8
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