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2010-10-13RegionInfo: Free the RegionNodes in cache.Tobias Grosser
Contributed by: ether git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116380 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-13Refactor VCMP instructions.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116379 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-12Add the rest of the ARM so_reg encoding options (register shifted register)Jim Grosbach
and move to a custom operand encoder. Remove the last of the special handling stuff from ARMMCCodeEmitter::EncodeInstruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116377 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-12Add encodings for VNMUL[SD].Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116375 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-12Add encodings for VDIV and VMUL.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116370 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-12Turn some fp stackifier assertion into errors to avoid silently generating ↵Evan Cheng
bad code when assertions are off. rdar://8540457. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116368 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-12Move the ARM so_imm encoding into a custom operand encoder and remove theJim Grosbach
explicit handling of the instructions referencing it from the MC code emitter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116367 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-12Refactor some of the encoding logic into a base class. This keeps us from havingBill Wendling
to add 10+ lines to every instruction. It may turn out that we can move this base class into it's parent class. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116362 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-12Add custom encoder for the 's' bit denoting whether an ARM arithmeticJim Grosbach
instruction should set the processor status flags or not. Remove the now unnecessary special handling for the bit from the MCCodeEmitter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116360 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-12Add encoding for VSUB and VCMP.Bill Wendling
Fear not! I'm going to try a refactoring right now. :) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116359 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-12Encoding for VADDD. Plus a test for the VFP instructions.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116348 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-12Split out the "size" field from the encoding. The newer documentation has it asBill Wendling
a separate bit in the coding. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116347 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-12Fix thinko in arm fast isel alloca rewrite.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116339 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-12Encoding for ARM-mode VADD.F32 instruction.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116338 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-12Begin adding static dependence information to passes, which will allow us toOwen Anderson
perform initialization without static constructors AND without explicit initialization by the client. For the moment, passes are required to initialize both their (potential) dependencies and any passes they preserve. I hope to be able to relax the latter requirement in the future. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116334 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-12Combine these together - should probably have some text associatedEric Christopher
that says what why what we just asserted is wrong. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116333 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-12Mark variable 'NoImplicitFloatOps' used only in an assert as used.Nick Lewycky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116323 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-12Add MOVi ARM encoding.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116321 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-12Initial va_arg support for x86-64. Patch by David Meyer!Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116319 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-12Nuke unused wrapper function.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116318 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-12Remove the x86 MOV{32,64}{rr,rm,mr}_TC instructions.Jakob Stoklund Olesen
The reg-reg copies were no longer being generated since copyPhysReg copies physical registers only. The loads and stores are not necessary - The TC constraint is imposed by the TAILJMP and TCRETURN instructions, there should be no need for constrained loads and stores. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116314 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-12Add encoding information for the remainder of the generic arithmeticJim Grosbach
ARM instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116313 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-12PR8359: The ARM backend may end up allocating registers D16 to D31 whenBob Wilson
"-mattr=+vfp3" is specified. However, this will not work for hardware that only supports 16 registers. Add a new flag to support -"mattr=+vfp3,+d16". Patch by Jan Voung! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116310 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-12Rework alloca handling so that we can load or store from castedEric Christopher
address that we've looked through. Fixes compilation problems in tramp3d from earlier patch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116296 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-12Handle a wider arrangement of loads.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116284 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-12Delete a redundant check.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116280 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-12More SmallVectorImpls.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116279 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-12Shrink a SmallVector with a known maximum size.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116278 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-12Constify.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116277 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-12Use SmallVectorImpl in a bunch of places.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116276 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-11More ARM scheduling itinerary fixes.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116266 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-11Support AA chaining.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116264 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-11Fix the pass manager's search order for immutable passes, and make itDan Gohman
stop searching when it has found a match. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116262 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-11MC machine encoding for simple aritmetic instructions that use a shiftedJim Grosbach
register operand. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116259 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-11Second set of ARM/MC/ELF changes.Jason W Kim
Added ARM specific ELF section types. Added AttributesSection to ARMElfTargetObject First step in unifying .cpu assembly tag with ELF/.o llc now asserts on actual ELF emission on -filetype=obj :-) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116257 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-11Proper VST scheduling itineraries.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116251 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-11Use a sane mechanism for that assert.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116249 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-11Replace FindLiveRangeContaining() with getVNInfoAt() in LiveIntervalAnalysis.Jakob Stoklund Olesen
This helps hiding the LiveRange class which really should be private. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116244 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-11We're not going to handle dynamic allocas anywhere else.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116240 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-11Change explicit search Apple specific code to only reference __eprintf on x86.Daniel Dunbar
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116239 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-11Make sure that the call stack adjustments have default operands. AlsoEric Christopher
leave custom lowerings for later. Fixes some nightly tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116232 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-11PowerPC varargs functions store live-in registers on the stack. Make sure we useJakob Stoklund Olesen
virtual registers for those stores since RegAllocFast requires that each live physreg only be used once. This fixes PR8357. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116222 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-11Found a bug turning this on by default. Disable again for now.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116220 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-11Fix help text.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116218 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-11Change flag from Enable to Disable since we're enabled by default.Eric Christopher
Also don't use fast-isel on non-darwin since it's untested. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116217 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-11Fixes bug 8297: i386 cmpxchg8b, missing MachineMemOperandAndrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116214 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-11More binary encoding stuff, taking advantage of the new "by name" operandJim Grosbach
matching in tblgen to do the predicate operand. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116213 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-11Turn on arm fast isel by default.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116212 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-11Properly handle reloading and spilling around partial redefines inJakob Stoklund Olesen
LocalRewriter. This is a bit of a hack that adds an implicit use operand to model the read-modify-write nature of a partial redef. Uses and defs are rewritten in separate passes, and a single operand would never be processed twice. <rdar://problem/8518892> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116210 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-11MSVC hangs on compilation of ARMDisassembler.cpp. PR6866 applied to ARM target.Francois Pichet
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116201 91177308-0d34-0410-b5e6-96231b3b80d8
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